| /external/llvm/test/CodeGen/ARM/ |
| D | fp16.ll | 1 …iple=armv7a--none-eabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-EABI %s
2 …le=armv7a--none-gnueabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-GNU %s
3 …e=armv7a--none-musleabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-GNU %s
29 ; CHECK-HARDFLOAT-EABI: __aeabi_h2f
30 ; CHECK-HARDFLOAT-GNU: __gnu_h2f_ieee
36 ; CHECK-HARDFLOAT-EABI: __aeabi_h2f
37 ; CHECK-HARDFLOAT-GNU: __gnu_h2f_ieee
44 ; CHECK-HARDFLOAT-EABI: __aeabi_f2h
45 ; CHECK-HARDFLOAT-GNU: __gnu_f2h_ieee
57 ; CHECK-HARDFLOAT-EABI: bl __aeabi_h2f
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | fp16.ll | 1 …iple=armv7a--none-eabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-EABI %s
2 …le=armv7a--none-gnueabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-GNU %s
3 …e=armv7a--none-musleabi < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-HARDFLOAT-GNU %s
29 ; CHECK-HARDFLOAT-EABI: __aeabi_h2f
30 ; CHECK-HARDFLOAT-GNU: __gnu_h2f_ieee
36 ; CHECK-HARDFLOAT-EABI: __aeabi_h2f
37 ; CHECK-HARDFLOAT-GNU: __gnu_h2f_ieee
44 ; CHECK-HARDFLOAT-EABI: __aeabi_f2h
45 ; CHECK-HARDFLOAT-GNU: __gnu_f2h_ieee
57 ; CHECK-HARDFLOAT-EABI: bl __aeabi_h2f
[all …]
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 194 ISA_MIPS32R6, HARDFLOAT;
198 ISA_MIPS32R6, HARDFLOAT;
202 ISA_MIPS32R6, HARDFLOAT;
207 ISA_MIPS32R6, HARDFLOAT;
211 ISA_MIPS32R6, HARDFLOAT;
216 ISA_MIPS32R6, HARDFLOAT;
220 ISA_MIPS32R6, HARDFLOAT;
225 ISA_MIPS32R6, HARDFLOAT;
230 ISA_MIPS32R6, HARDFLOAT;
235 ISA_MIPS32R6, HARDFLOAT;
[all …]
|
| D | MipsInstrFPU.td | 78 class HARDFLOAT { list<Predicate> HardFloatPredicate = [IsNotSoftFloat]; }
109 HARDFLOAT {
125 HARDFLOAT,
147 [(set DstRC:$rt, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, HARDFLOAT;
152 [(set DstRC:$fs, (OpNode SrcRC:$rt))], Itin, FrmFR, opstr>, HARDFLOAT;
157 !strconcat(opstr, "\t$rt, $fs"), [], Itin, FrmFR, opstr>, HARDFLOAT {
167 HARDFLOAT {
175 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr>, HARDFLOAT {
185 FrmFR, opstr>, HARDFLOAT;
192 Itin, FrmFR, opstr>, HARDFLOAT;
[all …]
|
| D | MicroMips32r6InstrInfo.td | 715 II_MTC1, bitconvert>, HARDFLOAT;
719 HARDFLOAT, FGR_32;
721 HARDFLOAT, FGR_64;
756 II_MFC1, bitconvert>, HARDFLOAT;
760 II_MFHC1>, HARDFLOAT, FGR_32;
762 II_MFHC1>, HARDFLOAT, FGR_64;
765 class LDC1_D64_MMR6_DESC : MipsR6Inst, HARDFLOAT, FGR_64 {
777 class SDC1_D64_MMR6_DESC : MipsR6Inst, HARDFLOAT, FGR_64 {
820 SDPatternOperator OpNode = null_frag> : HARDFLOAT {
844 class MADDF_S_MMR6_DESC : COP1_4R_DESC_BASE<"maddf.s", FGR32Opnd>, HARDFLOAT;
[all …]
|
| D | MipsCondMov.td | 31 HARDFLOAT {
41 Itin, FrmFR, opstr>, HARDFLOAT {
51 Itin, FrmFR, opstr>, HARDFLOAT {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 227 ISA_MIPS32R6, HARDFLOAT;
231 ISA_MIPS32R6, HARDFLOAT;
236 ISA_MIPS32R6, HARDFLOAT;
242 ISA_MIPS32R6, HARDFLOAT;
247 ISA_MIPS32R6, HARDFLOAT;
253 ISA_MIPS32R6, HARDFLOAT;
258 ISA_MIPS32R6, HARDFLOAT;
264 ISA_MIPS32R6, HARDFLOAT;
269 ISA_MIPS32R6, HARDFLOAT;
274 ISA_MIPS32R6, HARDFLOAT;
[all …]
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| D | MipsInstrFPU.td | 83 class HARDFLOAT { list<Predicate> HardFloatPredicate = [IsNotSoftFloat]; }
114 HARDFLOAT {
130 HARDFLOAT,
152 [(set DstRC:$rt, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, HARDFLOAT {
159 [(set DstRC:$fs, (OpNode SrcRC:$rt))], Itin, FrmFR, opstr>, HARDFLOAT {
166 !strconcat(opstr, "\t$rt, $fs"), [], Itin, FrmFR, opstr>, HARDFLOAT {
176 HARDFLOAT {
184 [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr>, HARDFLOAT {
194 FrmFR, opstr>, HARDFLOAT;
201 Itin, FrmFR, opstr>, HARDFLOAT;
[all …]
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| D | MicroMips32r6InstrInfo.td | 704 II_MTC1, bitconvert>, HARDFLOAT;
747 II_MFC1, bitconvert>, HARDFLOAT;
755 class LDC1_D64_MMR6_DESC : MipsR6Inst, HARDFLOAT, FGR_64 {
767 class SDC1_D64_MMR6_DESC : MipsR6Inst, HARDFLOAT, FGR_64 {
853 SDPatternOperator OpNode = null_frag> : HARDFLOAT {
870 II_MADDF_S>, HARDFLOAT;
872 II_MADDF_D>, HARDFLOAT;
874 II_MSUBF_S>, HARDFLOAT;
876 II_MSUBF_D>, HARDFLOAT;
881 : HARDFLOAT, NeverHasSideEffects {
[all …]
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| D | MicroMipsInstrFPU.td | 376 defm S_MM : C_COND_ALIASES<"s", FGR32Opnd>, HARDFLOAT,
378 defm D32_MM : C_COND_ALIASES<"d", AFGR64Opnd>, HARDFLOAT,
380 defm D64_MM : C_COND_ALIASES<"d", FGR64Opnd>, HARDFLOAT,
384 ISA_MICROMIPS32_NOT_MIPS32R6, HARDFLOAT;
|
| D | MipsCondMov.td | 31 HARDFLOAT {
41 Itin, FrmFR, opstr>, HARDFLOAT {
51 Itin, FrmFR, opstr>, HARDFLOAT {
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.cc | 350 HARDFLOAT void PrintfTrampolineRRRR( in PrintfTrampolineRRRR()
356 HARDFLOAT void PrintfTrampolineRRRD( in PrintfTrampolineRRRD()
362 HARDFLOAT void PrintfTrampolineRRDR( in PrintfTrampolineRRDR()
368 HARDFLOAT void PrintfTrampolineRRDD( in PrintfTrampolineRRDD()
374 HARDFLOAT void PrintfTrampolineRDRR( in PrintfTrampolineRDRR()
380 HARDFLOAT void PrintfTrampolineRDRD( in PrintfTrampolineRDRD()
386 HARDFLOAT void PrintfTrampolineRDDR( in PrintfTrampolineRDDR()
392 HARDFLOAT void PrintfTrampolineRDDD( in PrintfTrampolineRDDD()
398 HARDFLOAT void PrintfTrampolineDRRR( in PrintfTrampolineDRRR()
404 HARDFLOAT void PrintfTrampolineDRRD( in PrintfTrampolineDRRD()
[all …]
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| D | instructions-aarch32.h | 42 #define HARDFLOAT __attribute__((noinline, pcs("aapcs-vfp"))) macro
44 #define HARDFLOAT __attribute__((noinline)) macro
|