Searched refs:HHI_GCLK_MPEG1 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/clk/ |
| D | clk_meson.c | 50 MESON_GATE(CLKID_I2S_SPDIF, HHI_GCLK_MPEG1, 2),
51 MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
52 MESON_GATE(CLKID_DEMUX, HHI_GCLK_MPEG1, 4),
53 MESON_GATE(CLKID_AIU_GLUE, HHI_GCLK_MPEG1, 6),
54 MESON_GATE(CLKID_IEC958, HHI_GCLK_MPEG1, 7),
55 MESON_GATE(CLKID_I2S_OUT, HHI_GCLK_MPEG1, 8),
56 MESON_GATE(CLKID_AMCLK, HHI_GCLK_MPEG1, 9),
57 MESON_GATE(CLKID_AIFIFO2, HHI_GCLK_MPEG1, 10),
58 MESON_GATE(CLKID_MIXER, HHI_GCLK_MPEG1, 11),
59 MESON_GATE(CLKID_MIXER_IFACE, HHI_GCLK_MPEG1, 12),
[all …]
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| /external/u-boot/arch/arm/include/asm/arch-meson/ |
| D | clock.h | 36 #define HHI_GCLK_MPEG1 0x144 /* 0x51 offset in data sheet */ macro
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