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Searched refs:HHI_SAR_CLK_CNTL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock.h113 #define HHI_SAR_CLK_CNTL 0x3D8 /* 0xf6 offset in data sheet */ macro
/external/u-boot/drivers/clk/
Dclk_meson.c125 MESON_GATE(CLKID_SAR_ADC_CLK, HHI_SAR_CLK_CNTL, 8),