Searched refs:HID0 (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/arch/powerpc/cpu/mpc86xx/ |
| D | cache.S | 36 mfspr r3,HID0
38 mtspr HID0,r3
46 mfspr r3,HID0
48 mtspr HID0,r3
175 mfspr r3, HID0
180 mtspr HID0, r5
181 mtspr HID0, r3
193 mfspr r3, HID0
197 mtspr HID0, r3
205 mfspr r3, HID0
[all …]
|
| D | release.S | 58 mfspr r0, HID0
61 mtspr HID0, r0
100 mfspr r3, HID0
103 mtspr HID0, r3 /* no invalidate, unlock */
106 mtspr HID0, r5 /* enable + invalidate */
107 mtspr HID0, r3 /* enable */
119 mfspr r3, HID0
124 mtspr HID0, r5
125 mtspr HID0, r3
130 mfspr r4, HID0
[all …]
|
| D | start.S | 145 mtspr HID0, r0
866 mfspr r0, HID0
869 mtspr HID0, r0
917 mfspr r0, HID0
920 mtspr HID0, r0
953 mfspr r0, HID0
959 mtspr HID0, r0
978 mtspr HID0, r0
|
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| D | start.S | 547 mtspr HID0, r3
552 mtspr HID0, r3
738 mfspr r3, HID0
744 mtspr HID0, r4 /* sets enable and invalidate, clears lock */
746 mtspr HID0, r3 /* clears invalidate */
751 mfspr r3, HID0
756 mtspr HID0, r3 /* clears invalidate, enable and lock */
761 mfspr r3, HID0
768 mfspr r3, HID0
773 mtspr HID0, r3 /* enable, no invalidate */
[all …]
|
| /external/u-boot/arch/powerpc/include/asm/ |
| D | processor.h | 625 #define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ macro
|
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | start.S | 311 mtspr HID0,r0
|