/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions-v8.txt | 5 # HLT
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/external/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions-v8.txt | 5 # HLT
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-arm-instructions-v8.s | 6 @ HLT
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D | basic-thumb2-instructions-v8.s | 6 @ HLT (in ARMv8 only)
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D | thumb-diagnostics.s | 69 @ Out of range immediates for v8 HLT instruction.
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions-v8.s | 6 @ HLT
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D | basic-thumb2-instructions-v8.s | 6 @ HLT (in ARMv8 only)
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D | thumb-diagnostics.s | 45 @ Out of range immediates for v8 HLT instruction.
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.cc | 3731 case HLT: in VisitException() 6393 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoUnreachable() 6404 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoTrace() 6431 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoLog() 6452 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoPrintf() 6597 VIXL_ASSERT(instr->Mask(ExceptionMask) == HLT); in DoConfigureCPUFeatures() 6637 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoSaveCPUFeatures() 6646 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) && in DoRestoreCPUFeatures()
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D | constants-aarch64.h | 741 HLT = ExceptionFixed | 0x00400000, enumerator
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D | disasm-aarch64.cc | 2143 case HLT: in VisitException()
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/external/v8/src/arm64/ |
D | simulator-arm64.cc | 290 HLT | Assembler::ImmException(kImmExceptionIsRedirectedCall)); in SetRedirectInstruction() 3351 case HLT: { in VisitException() 3420 DCHECK(pc_->Mask(ExceptionMask) == HLT); in VisitException() 5579 DCHECK((instr->Mask(ExceptionMask) == HLT) && in DoPrintf()
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D | assembler-arm64.cc | 951 if ((instr->Mask(ExceptionMask) == HLT) && in ConstantPoolSizeAt() 960 if ((instr->Mask(ExceptionMask) == HLT) && in ConstantPoolSizeAt() 4057 Emit(HLT | ImmException(code)); in hlt()
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D | constants-arm64.h | 758 HLT = ExceptionFixed | 0x00400000, enumerator
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D | disasm-arm64.cc | 1284 case HLT: mnemonic = "hlt"; break; in VisitException()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrSystem.td | 29 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", []>;
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/external/llvm/lib/Target/X86/ |
D | X86InstrSystem.td | 31 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", [], IIC_HLT>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrSystem.td | 30 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", []>;
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 434 #define HLT CHOICE(hlt, hlt, hlt) macro 1163 #define HLT hlt macro
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedFalkorDetails.td | 1246 def : InstRW<[FalkorWr_1none_0cyc], (instrs BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, ISB, SMC, S…
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D | AArch64SchedKryoDetails.td | 478 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMScheduleA57.td | 129 "(t2|t)?HINT$", "(t)?HLT$", "(t2)?HVC$", "(t2)?ISB$", "ITasm$",
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1123 828720U, // HLT 4343 0U, // HLT 7183 // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, RFEDA, RFEDB, RFEIA, R...
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/external/capstone/arch/X86/ |
D | X86GenAsmWriter1_reduce.inc | 522 3347U, // HLT
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SchedKryoDetails.td | 478 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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