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Searched refs:HPIPE_TX_TRAIN_CTRL_GN1_OFFSET (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/phy/marvell/
Dcomphy_hpipe.h403 #define HPIPE_TX_TRAIN_CTRL_GN1_OFFSET 1 macro
405 (0x1 << HPIPE_TX_TRAIN_CTRL_GN1_OFFSET)
Dcomphy_cp110.c292 data |= 0x1 << HPIPE_TX_TRAIN_CTRL_GN1_OFFSET; in comphy_pcie_power_up()