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Searched refs:HPM_SEL_SCLK_MPLL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dexynos5_setup.h156 #define HPM_SEL_SCLK_MPLL (1 << 21) macro
Dclock_init_exynos5.c597 } while ((val | HPM_SEL_SCLK_MPLL) != val); in exynos5250_system_clock_init()