Searched refs:HWS_HIGH2LOW (Results 1 – 4 of 4) sorted by relevance
/external/u-boot/drivers/ddr/marvell/a38x/ |
D | ddr3_training_centralization.c | 139 search_dir_id <= HWS_HIGH2LOW; in ddr3_tip_centralization() 178 [HWS_HIGH2LOW] in ddr3_tip_centralization() 198 (result[HWS_HIGH2LOW], result_type))) { in ddr3_tip_centralization() 551 search_dir_id <= HWS_HIGH2LOW; in ddr3_tip_special_rx() 593 GET_TAP_RESULT(result[HWS_HIGH2LOW] in ddr3_tip_special_rx() 599 (result[HWS_HIGH2LOW], result_type)))) { in ddr3_tip_special_rx()
|
D | ddr3_training_ip_engine.c | 986 (search_dir > HWS_HIGH2LOW) || in ddr3_tip_ip_training_wrapper_int() 1003 end_search = HWS_HIGH2LOW; in ddr3_tip_ip_training_wrapper_int() 1174 for (search_dir_id = HWS_LOW2HIGH; search_dir_id <= HWS_HIGH2LOW; in ddr3_tip_ip_training_wrapper() 1188 e2 = GET_TAP_RESULT(result[HWS_HIGH2LOW][0], EDGE_1); in ddr3_tip_ip_training_wrapper() 1193 result[HWS_HIGH2LOW][0], e2)); in ddr3_tip_ip_training_wrapper() 1196 GET_LOCK_RESULT(result[HWS_HIGH2LOW][0])); in ddr3_tip_ip_training_wrapper() 1259 result[HWS_HIGH2LOW][0], e2)); in ddr3_tip_ip_training_wrapper() 1270 h2l_if_train_res = ddr3_tip_get_buf_ptr(dev_num, HWS_HIGH2LOW, result_type, if_id); in ddr3_tip_ip_training_wrapper() 1313 control_element, HWS_HIGH2LOW, in ddr3_tip_ip_training_wrapper() 1331 bit_id, HWS_HIGH2LOW, direction, result_type, in ddr3_tip_ip_training_wrapper()
|
D | ddr3_training_ip_def.h | 125 HWS_HIGH2LOW, enumerator
|
D | ddr3_training_pbs.c | 39 (pbs_mode == PBS_RX_MODE) ? HWS_HIGH2LOW : HWS_LOW2HIGH; in ddr3_tip_pbs() 472 HWS_HIGH2LOW; in ddr3_tip_pbs() 609 HWS_LOW2HIGH : HWS_HIGH2LOW; in ddr3_tip_pbs()
|