| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 5148 false, /* HasDisjunctSubRegs */
5160 false, /* HasDisjunctSubRegs */
5172 false, /* HasDisjunctSubRegs */
5184 false, /* HasDisjunctSubRegs */
5196 false, /* HasDisjunctSubRegs */
5208 false, /* HasDisjunctSubRegs */
5220 true, /* HasDisjunctSubRegs */
5232 true, /* HasDisjunctSubRegs */
5244 false, /* HasDisjunctSubRegs */
5256 false, /* HasDisjunctSubRegs */
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenRegisterInfo.inc | 4684 true, /* HasDisjunctSubRegs */
4696 true, /* HasDisjunctSubRegs */
4708 true, /* HasDisjunctSubRegs */
4720 false, /* HasDisjunctSubRegs */
4732 false, /* HasDisjunctSubRegs */
4744 false, /* HasDisjunctSubRegs */
4756 false, /* HasDisjunctSubRegs */
4768 false, /* HasDisjunctSubRegs */
4780 false, /* HasDisjunctSubRegs */
4792 false, /* HasDisjunctSubRegs */
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
| D | ConcatenatedSubregs.td | 102 // CHECK: HasDisjunctSubRegs: 1
107 // CHECK: HasDisjunctSubRegs: 1
120 // CHECK: HasDisjunctSubRegs: 1
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 5688 false, /* HasDisjunctSubRegs */
5700 false, /* HasDisjunctSubRegs */
5712 false, /* HasDisjunctSubRegs */
5724 false, /* HasDisjunctSubRegs */
5736 false, /* HasDisjunctSubRegs */
5748 false, /* HasDisjunctSubRegs */
5760 false, /* HasDisjunctSubRegs */
5772 false, /* HasDisjunctSubRegs */
5784 false, /* HasDisjunctSubRegs */
5796 false, /* HasDisjunctSubRegs */
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 6710 false, /* HasDisjunctSubRegs */
6722 false, /* HasDisjunctSubRegs */
6734 false, /* HasDisjunctSubRegs */
6746 false, /* HasDisjunctSubRegs */
6758 false, /* HasDisjunctSubRegs */
6770 false, /* HasDisjunctSubRegs */
6782 false, /* HasDisjunctSubRegs */
6794 false, /* HasDisjunctSubRegs */
6806 false, /* HasDisjunctSubRegs */
6818 false, /* HasDisjunctSubRegs */
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 156 bool HasDisjunctSubRegs; member
337 bool HasDisjunctSubRegs; variable
|
| D | CodeGenRegisters.cpp | 161 HasDisjunctSubRegs(false), in CodeGenRegister()
273 HasDisjunctSubRegs = ExplicitSubRegs.size() > 1; in computeSubRegs()
296 HasDisjunctSubRegs |= ESR->HasDisjunctSubRegs; in computeSubRegs()
2033 RC.HasDisjunctSubRegs = false; in computeDerivedInfo()
2036 RC.HasDisjunctSubRegs |= Reg->HasDisjunctSubRegs; in computeDerivedInfo()
|
| D | RegisterInfoEmitter.cpp | 1372 << (RC.HasDisjunctSubRegs?"true":"false") in runTargetDesc()
1600 OS << "\tHasDisjunctSubRegs: " << RC.HasDisjunctSubRegs << '\n'; in debugDump()
1632 OS << "\tHasDisjunctSubRegs: " << R.HasDisjunctSubRegs << '\n'; in debugDump()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 131 bool HasDisjunctSubRegs; member
312 bool HasDisjunctSubRegs; variable
|
| D | CodeGenRegisters.cpp | 111 HasDisjunctSubRegs(false), in CodeGenRegister()
221 HasDisjunctSubRegs = ExplicitSubRegs.size() > 1; in computeSubRegs()
243 HasDisjunctSubRegs |= SR->HasDisjunctSubRegs; in computeSubRegs()
1834 RC.HasDisjunctSubRegs = false; in computeDerivedInfo()
1837 RC.HasDisjunctSubRegs |= Reg->HasDisjunctSubRegs; in computeDerivedInfo()
|
| D | RegisterInfoEmitter.cpp | 1330 << (RC.HasDisjunctSubRegs?"true":"false") in runTargetDesc()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 72 const bool HasDisjunctSubRegs; variable
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 60 const bool HasDisjunctSubRegs; variable
|
| D | MachineRegisterInfo.h | 216 return subRegLivenessEnabled() && RC.HasDisjunctSubRegs; in shouldTrackSubRegLiveness()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 192 return subRegLivenessEnabled() && RC.HasDisjunctSubRegs; in shouldTrackSubRegLiveness()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 355 if (!RC.HasDisjunctSubRegs) in getLaneMaskForMO()
|
| /external/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 406 if (!RC.HasDisjunctSubRegs) in getLaneMaskForMO()
|