Home
last modified time | relevance | path

Searched refs:HasV8_1aOps (Results 1 – 25 of 29) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc1685 { "PAN", 0x4, {AArch64::HasV8_1aOps} }, // 3
2079 { "LORID_EL1", 0xC527, true, false, {AArch64::HasV8_1aOps} }, // 97
2565 { "PAN", 0xC213, true, true, {AArch64::HasV8_1aOps} }, // 583
2566 { "LORSA_EL1", 0xC520, true, true, {AArch64::HasV8_1aOps} }, // 584
2567 { "LOREA_EL1", 0xC521, true, true, {AArch64::HasV8_1aOps} }, // 585
2568 { "LORN_EL1", 0xC522, true, true, {AArch64::HasV8_1aOps} }, // 586
2569 { "LORC_EL1", 0xC523, true, true, {AArch64::HasV8_1aOps} }, // 587
2570 { "TTBR1_EL2", 0xE101, true, true, {AArch64::HasV8_1aOps} }, // 588
2571 { "CONTEXTIDR_EL2", 0xE681, true, true, {AArch64::HasV8_1aOps} }, // 589
2572 { "CNTHV_TVAL_EL2", 0xE718, true, true, {AArch64::HasV8_1aOps} }, // 590
[all …]
DAArch64GenSubtargetInfo.inc60 HasV8_1aOps = 44,
149 …duler, AArch64::FeaturePredictableSelectIsExpensive, AArch64::FeatureLSE, AArch64::HasV8_1aOps } },
156 …{ "v8.1a", "Support ARM v8.1a instructions", { AArch64::HasV8_1aOps }, { AArch64::FeatureCRC, AArc…
157 …{ "v8.2a", "Support ARM v8.2a instructions", { AArch64::HasV8_2aOps }, { AArch64::HasV8_1aOps, AAr…
10936 if (Bits[AArch64::HasV8_1aOps]) HasV8_1aOps = true;
/external/llvm/lib/Target/AArch64/
DAArch64.td112 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
116 "Support ARM v8.2a instructions", [HasV8_1aOps, FeatureRAS]>;
253 HasV8_1aOps]>;
DAArch64Subtarget.h54 bool HasV8_1aOps = false; variable
165 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
DAArch64SystemOperands.td190 let Requires = [{ {AArch64::HasV8_1aOps} }] in
417 let Requires = [{ {AArch64::HasV8_1aOps} }] in
935 let Requires = [{ {AArch64::HasV8_1aOps} }] in
940 let Requires = [{ {AArch64::HasV8_1aOps} }] in {
949 let Requires = [{ {AArch64::HasV8_1aOps} }] in {
DAArch64InstrInfo.td18 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64Subtarget.h66 bool HasV8_1aOps = false; variable
210 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
DAArch64.td203 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
207 "Support ARM v8.2a instructions", [HasV8_1aOps, FeatureRAS]>;
455 HasV8_1aOps]>;
DAArch64SystemOperands.td293 let Requires = [{ {AArch64::HasV8_1aOps} }] in
587 let Requires = [{ {AArch64::HasV8_1aOps} }] in
1105 let Requires = [{ {AArch64::HasV8_1aOps} }] in
1110 let Requires = [{ {AArch64::HasV8_1aOps} }] in {
1119 let Requires = [{ {AArch64::HasV8_1aOps} }] in {
DAArch64InstrInfo.td18 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
/external/llvm/lib/Target/ARM/
DARMSubtarget.h96 bool HasV8_1aOps = false; variable
402 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
DARM.td299 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
304 [HasV8_1aOps]>;
448 def ARMv81a : Architecture<"armv8.1-a", "ARMv81a", [HasV8_1aOps,
DARMInstrInfo.td219 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMSubtarget.h152 bool HasV8_1aOps = false; variable
528 bool hasV8_1aOps() const { return HasV8_1aOps; } in hasV8_1aOps()
DARM.td427 def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
433 [HasV8_1aOps]>;
610 def ARMv81a : Architecture<"armv8.1-a", "ARMv81a", [HasV8_1aOps,
DARMInstrInfo.td251 AssemblerPredicate<"HasV8_1aOps", "armv8.1a">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMTargetStreamer.cpp222 STI.hasFeature(ARM::HasV8_1aOps) in emitTargetAttributes()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenSubtargetInfo.inc130 HasV8_1aOps = 114,
223 …{ "armv8.1-a", "ARMv81a architecture", { ARM::ARMv81a }, { ARM::HasV8_1aOps, ARM::FeatureAClass, A…
308 { "v8.1a", "Support ARM v8.1a instructions", { ARM::HasV8_1aOps }, { ARM::HasV8Ops } },
309 { "v8.2a", "Support ARM v8.2a instructions", { ARM::HasV8_2aOps }, { ARM::HasV8_1aOps } },
16609 if (Bits[ARM::HasV8_1aOps]) HasV8_1aOps = true;
DARMGenDisassemblerTables.inc11223 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV8Ops] && Bits[ARM::HasV8_1aOps]);
11257 return (Bits[ARM::FeatureNEON] && Bits[ARM::HasV8_1aOps]);
11277 …Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV8Ops] && Bits[ARM::HasV8_1aOps]);
DARMGenMCCodeEmitter.inc11207 if ((FB[ARM::HasV8_1aOps]))
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp2727 if (FBS[AArch64::HasV8_1aOps]) in setRequiredFeatureString()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2174 if (!FeatureBits[ARM::HasV8_1aOps] || in DecodeSETPANInstruction()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2175 if (!FeatureBits[ARM::HasV8_1aOps] || in DecodeSETPANInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp498 return getSTI().getFeatureBits()[ARM::HasV8_1aOps]; in hasV8_1aOps()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp297 return getSTI().getFeatureBits()[ARM::HasV8_1aOps]; in hasV8_1aOps()

12