Searched refs:HiVec (Results 1 – 3 of 3) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPatternsHVX.td | 36 def HiVec: OutPatFrag<(ops node:$Vs), (EXTRACT_SUBREG $Vs, vsub_hi)>;
331 (V6_vpackeb (HiVec $Vss), (LoVec $Vss))>;
333 (V6_vpackeh (HiVec $Vss), (LoVec $Vss))>;
364 (V6_vpackeb (V6_vaslh (HiVec (VZxtb HvxVR:$Vs)), I32:$Rt),
367 (V6_vpackeb (V6_vasrh (HiVec (VSxtb HvxVR:$Vs)), I32:$Rt),
370 (V6_vpackeb (V6_vlsrh (HiVec (VZxtb HvxVR:$Vs)), I32:$Rt),
398 (V6_vpackeb (V6_vpopcounth (HiVec (V6_vunpackub HvxVR:$Vs))),
403 (HiVec (V6_vzh (V6_vpopcounth HvxVR:$Vs))))>;
406 (V6_vsubb (V6_vpackeb (V6_vcl0h (HiVec (V6_vunpackub HvxVR:$Vs))),
|
| D | HexagonISelLoweringHVX.cpp | 1322 auto HiVec = [&DAG,ResTy,dl] (SDValue Pair) { in LowerHvxMulh() local
1346 {LoVec(T2), HiVec(T2)}, DAG); in LowerHvxMulh()
1350 SDValue T6 = DAG.getNode(ISD::ADD, dl, ResTy, {HiVec(T0), HiVec(T3)}); in LowerHvxMulh()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4224 SDValue HiVec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, HiHalf); in lowerINSERT_VECTOR_ELT() local
4229 InsertLo ? LoVec : HiVec, in lowerINSERT_VECTOR_ELT()
|