| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | LowerSwitch.cpp | 48 int64_t Low, High; member
63 [](const IntRange &A, const IntRange &B) { return A.High < B.High; }); in IsInRanges()
83 ConstantInt* High; member
87 : Low(low), High(high), BB(bb) {} in CaseRange()
112 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); in operator ()()
165 O << *B->Low << " -" << *B->High; in operator <<()
232 if (Begin->Low == LowerBound && Begin->High == UpperBound) { in switchConvert()
251 << Pivot.High->getValue() << "\n"); in switchConvert()
266 int64_t GapLow = LHS.back().High->getSExtValue() + 1; in switchConvert()
270 NewUpperBound = LHS.back().High; in switchConvert()
[all …]
|
| /external/llvm/lib/Transforms/Utils/ |
| D | LowerSwitch.cpp | 36 int64_t Low, High; member
48 [](const IntRange &A, const IntRange &B) { return A.High < B.High; }); in IsInRanges()
64 ConstantInt* High; member
68 : Low(low), High(high), BB(bb) {} in CaseRange()
93 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); in operator ()()
145 O << *B->Low << " -" << *B->High; in operator <<()
212 if (Begin->Low == LowerBound && Begin->High == UpperBound) { in switchConvert()
232 << " -" << Pivot.High->getValue() << "\n"); in switchConvert()
247 int64_t GapLow = LHS.back().High->getSExtValue() + 1; in switchConvert()
251 NewUpperBound = LHS.back().High; in switchConvert()
[all …]
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceSwitchLowering.h | 44 : Kind(Range), Low(Value), High(Value), Target(Target) {} in CaseCluster()
46 CaseCluster(uint64_t Low, uint64_t High, InstJumpTable *JT) in CaseCluster() argument
47 : Kind(JumpTable), Low(Low), High(High), JT(JT) {} in CaseCluster()
51 uint64_t getHigh() const { return High; } in getHigh()
61 bool isUnitRange() const { return Low == High; } in isUnitRange()
62 bool isPairRange() const { return Low == High - 1; } in isPairRange()
71 uint64_t High; variable
|
| D | IceSwitchLowering.cpp | 38 return x.High < y.Low; in clusterizeSwitch()
64 const uint64_t MaxValue = CaseClusters.back().High; in clusterizeSwitch()
83 for (uint64_t I = Case.Low; I < Case.High; ++I) in clusterizeSwitch()
85 JumpTable->addTarget(Case.High - MinValue, Case.Target); in clusterizeSwitch()
99 this->Target == New.Target && this->High + 1 == New.Low; in tryAppend()
101 this->High = New.High; in tryAppend()
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | LowerSwitch.cpp | 51 Constant* High; member
55 Low(low), High(high), BB(bb) { } in CaseRange()
77 const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); in operator ()()
120 O << *B->Low << " -" << *B->High; in operator <<()
148 << cast<ConstantInt>(Pivot.High)->getValue() << "\n"); in switchConvert()
186 if (Leaf.Low == Leaf.High) { in newLeafBlock()
194 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_SLE, Val, Leaf.High, in newLeafBlock()
198 Comp = new ICmpInst(*NewLeaf, ICmpInst::ICMP_ULE, Val, Leaf.High, in newLeafBlock()
206 Constant *UpperBound = ConstantExpr::getAdd(NegLo, Leaf.High); in newLeafBlock()
221 uint64_t Range = cast<ConstantInt>(Leaf.High)->getSExtValue() - in newLeafBlock()
[all …]
|
| /external/llvm/lib/IR/ |
| D | IntrinsicInst.cpp | 63 const char *const *High = NameTable.end(); in lookupLLVMIntrinsicByName() local
65 while (CmpEnd < Name.size() && High - Low > 0) { in lookupLLVMIntrinsicByName()
73 std::tie(Low, High) = std::equal_range(Low, High, Name.data(), Cmp); in lookupLLVMIntrinsicByName()
75 if (High - Low > 0) in lookupLLVMIntrinsicByName()
|
| /external/gemmlowp/meta/generators/ |
| D | mul_1x8_Mx8_neon.py | 64 emitter.AllLanes(registers.High(register))],
113 registers.Low(aggregator), registers.High(aggregator))
118 emitter.EmitVPadd('u32', registers.High(temp), registers.Low(aggregators[2]),
134 emitter.EmitVPadd('u32', registers.High(temp_2),
142 emitter.EmitVPadd('u32', registers.High(temp_2),
177 emitter.EmitVStoreA('1.32', [registers.Low(temp), registers.High(temp)],
182 emitter.EmitVStoreA('1.32', [registers.Low(temp), registers.High(temp),
187 [registers.Low(temp), registers.High(temp), registers.Low(temp_2)],
190 registers.High(temp_2), 0), emitter.Dereference(results, None))
192 emitter.EmitVStoreA('1.32', [registers.Low(temp), registers.High(temp),
[all …]
|
| D | qnt_Nx8_neon.py | 41 emitter.AllLanes(registers.High(register))],
117 '1.32', [registers.Low(lane.load_1), registers.High(lane.load_1),
118 registers.Low(lane.load_2), registers.High(lane.load_2)],
127 quantize_setup.append([lane.load_2, lane.offset, registers.High(lane_temp)])
157 registers.High(lane.load_1), 0),
162 registers.High(lane.load_1)],
167 registers.High(lane.load_1)],
176 registers.High(lane.load_1),
182 registers.High(lane.load_1),
187 registers.High(lane.load_2), 0),
[all …]
|
| D | mul_Nx8_Mx8_neon.py | 43 lanes.AddLane(registers.High(quad_register))
201 registers.High(values), 0))
208 registers.High(values), 0))
210 registers.High(values), 1))
242 emitter.EmitVPadd('u32', registers.High(register),
250 emitter.EmitVPadd('u32', registers.High(register),
272 registers.High(aggregator),
277 '1.32', [registers.Low(aggregator), registers.High(aggregator)],
319 registers.Low(aggregator), registers.High(aggregator))
|
| /external/icu/icu4c/source/data/translit/ |
| D | blt_blt_FONIPA.txt | 60 $LO $W? $V12 {($CHK)} → $1 ˧˥; # Tone class 2: High-rising tone
61 $LO $W? {($V3 $CHK)} → $1 ˧˥; # Tone class 2: High-rising tone
62 $HI $W? $V12 {($CHK)} → $1 ˦; # Tone class 5: High-mid tone
63 $HI $W? {($V3 $CHK)} → $1 ˦; # Tone class 5: High-mid tone
67 $LO $W? { \uAABF ($V3 $F?)} → $1 ˧˥; # Tone class 2: High-rising tone
69 $HI $W? { \uAABF ($V3 $F?)} → $1 ˦; # Tone class 5: High-mid tone
74 $LO $W? $V12 { \uAABF ($F?)} → $1 ˧˥; # Tone class 2: High-rising tone
76 $HI $W? $V12 { \uAABF ($F?)} → $1 ˦; # Tone class 5: High-mid tone
80 {($HI $W? $V123 $F?)} $NOT_IPA_TONE → $1 ˥; # Tone class 4: High tone.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
| D | IntrinsicInst.cpp | 75 const char *const *High = NameTable.end(); in lookupLLVMIntrinsicByName() local
77 while (CmpEnd < Name.size() && High - Low > 0) { in lookupLLVMIntrinsicByName()
85 std::tie(Low, High) = std::equal_range(Low, High, Name.data(), Cmp); in lookupLLVMIntrinsicByName()
87 if (High - Low > 0) in lookupLLVMIntrinsicByName()
|
| /external/autotest/client/site_tests/video_PlaybackPerf/ |
| D | control.vp9.hfr | 8 Test the cpu usage and dropped frame count of VP9 High Frame Rate (60fps) video
12 The test outputs the cpu usage and dropped frame count of VP9 High Frame Rate
22 This test measures the CPU usage and dropped frame count of VP9 High Frame Rate
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 151 const ConstantInt *Low, *High; member
159 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High, in range()
164 C.High = High; in range()
171 const ConstantInt *High, unsigned JTCasesIndex, in jumpTable()
176 C.High = High; in jumpTable()
182 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High, in bitTests()
187 C.High = High; in bitTests()
322 bool rangeFitsInWord(const APInt &Low, const APInt &High);
327 const APInt &Low, const APInt &High);
|
| /external/u-boot/board/Synology/ds109/ |
| D | openocd.cfg | 47 mww 0xD000140C 0x00000833 ;# DDR SDRAM Timing (High) Register
53 mww 0xD0001424 0x0000F1FF ;# Dunit Control High Register
54 mww 0xD0001428 0x00085520 ;# Dunit Control High Register
55 mww 0xD000147c 0x00008552 ;# Dunit Control High Register
64 mww 0xD0001498 0x00000000 ;# DDR2 SDRAM ODT Control (High) REgister
|
| /external/clang/test/Index/ |
| D | complete-type-factors.m | 9 High
31 [a method:Red priority:High];
41 // CHECK-CC1: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (32)
56 // CHECK-CC2: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
72 // CHECK-CC3: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
88 // CHECK-CC4: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
106 // CHECK-CC6: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
122 // CHECK-CC7: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (65)
134 // CHECK-CC8: EnumConstantDecl:{ResultType enum Priority}{TypedText High} (16)
|
| /external/llvm/test/Analysis/LoopAccessAnalysis/ |
| D | number-of-memchecks.ll | 99 ; CHECK-NEXT: (Low: %c High: (78 + %c))
103 ; CHECK-NEXT: (Low: %a High: (40 + %a))
107 ; CHECK-NEXT: (Low: %b High: (38 + %b))
171 ; CHECK-NEXT: (Low: %c High: (78 + %c))
175 ; CHECK-NEXT: (Low: %a High: (40 + %a))
179 ; CHECK-NEXT: (Low: %b High: (38 + %b))
250 ; CHECK-NEXT: (Low: ((2 * %offset) + %a)<nsw> High: (9998 + (2 * %offset) + %a))
253 ; CHECK-NEXT: (Low: %a High: (9998 + %a))
256 ; CHECK-NEXT: (Low: (20000 + %a) High: (29998 + %a))
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/LoopAccessAnalysis/ |
| D | number-of-memchecks.ll | 99 ; CHECK-NEXT: (Low: %c High: (80 + %c))
103 ; CHECK-NEXT: (Low: %a High: (42 + %a))
107 ; CHECK-NEXT: (Low: %b High: (40 + %b))
171 ; CHECK-NEXT: (Low: %c High: (80 + %c))
175 ; CHECK-NEXT: (Low: %a High: (42 + %a))
179 ; CHECK-NEXT: (Low: %b High: (40 + %b))
250 ; CHECK-NEXT: (Low: ((2 * %offset) + %a)<nsw> High: (10000 + (2 * %offset) + %a))
253 ; CHECK-NEXT: (Low: %a High: (10000 + %a))
256 ; CHECK-NEXT: (Low: (20000 + %a) High: (30000 + %a))
|
| D | memcheck-off-by-one-error.ll | 15 ; (Low: %src High: (24 + %src))
22 ;CHECK: (Low: %op High: (32 + %op))
23 ;CHECK: (Low: %src High: (32 + %src))
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonAsmPrinter.cpp | 413 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
416 TmpInst.addOperand(MCOperand::createReg(High)); in HexagonProcessInstruction()
501 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
503 MO.setReg(High); in HexagonProcessInstruction()
513 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
515 MO.setReg(High); in HexagonProcessInstruction()
526 unsigned High = RI->getSubReg(MO.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction() local
528 MO.setReg(High); in HexagonProcessInstruction()
|
| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | InlineAsm.h | 283 unsigned High = Flag >> 16;
286 if (!High)
288 RC = High - 1;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.h | 162 const ConstantInt *Low, *High; member
170 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High, in range()
175 C.High = High; in range()
182 const ConstantInt *High, unsigned JTCasesIndex, in jumpTable()
187 C.High = High; in jumpTable()
193 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High, in bitTests()
198 C.High = High; in bitTests()
|
| /external/python/cpython3/Doc/library/ |
| D | asyncio-api-index.rst | 5 High-level API Index
129 High-level APIs to work with network IO.
148 - High-level async/await object to receive network data.
151 - High-level async/await object to send network data.
|
| /external/llvm/include/llvm/IR/ |
| D | InlineAsm.h | 351 unsigned High = Flag >> 16; in hasRegClassConstraint() local
354 if (!High) in hasRegClassConstraint()
356 RC = High - 1; in hasRegClassConstraint()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | InlineAsm.h | 354 unsigned High = Flag >> 16; in hasRegClassConstraint() local
357 if (!High) in hasRegClassConstraint()
359 RC = High - 1; in hasRegClassConstraint()
|
| /external/u-boot/board/keymile/km_arm/ |
| D | kwbimage-memphis.cfg | 42 # If not it could cause KW Exceptions during boot in Fast Corners/High Voltage
76 DATA 0xFFD0140C 0x00000A3E # DDR Timing (High)
119 DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
139 DATA 0xFFD0147c 0x00008451 # DDR2 SDRAM Timing High
161 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
|