| /external/vixl/src/aarch32/ |
| D | operands-aarch32.cc | 129 if (dt.GetValue() == I16) { in ImmediateVbic()
165 return I16; in DecodeDt()
204 case I16: in ImmediateVmov()
306 return I16; in DecodeDt()
366 case I16: in ImmediateVmvn()
414 return I16; in DecodeDt()
451 if (dt.GetValue() == I16) { in ImmediateVorr()
487 return I16; in DecodeDt()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrFormats.td | 77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr,
94 : I16<op, RREForm, outs, ins, asmstr, pattern>;
102 : I16<op, RXYForm, outs, ins, asmstr, pattern>;
110 : I16<op, RSYForm, outs, ins, asmstr, pattern>;
118 : I16<op, SIYForm, outs, ins, asmstr, pattern>;
121 : I16<op, SILForm, outs, ins, asmstr, pattern>;
|
| /external/libhevc/common/arm/ |
| D | ihevc_sao_edge_offset_class1.s | 116 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
117 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
208 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
211 VMOVN.I16 D21,Q4 @vmovn_s16(pi2_tmp_cur_row.val[1])
222 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
224 VMOVN.I16 D31,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1])
258 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
259 VMOVN.I16 D31,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1])
333 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
341 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
[all …]
|
| D | ihevc_sao_edge_offset_class1_chroma.s | 119 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
120 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
218 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
221 VMOVN.I16 D21,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1])
234 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
236 VMOVN.I16 D31,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1])
275 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
276 VMOVN.I16 D31,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1])
359 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
371 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
[all …]
|
| D | ihevc_sao_edge_offset_class0.s | 92 VMOV.I16 Q2,#0 @const_min_clip = vdupq_n_s16(0)
96 VMOV.I16 Q3,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
244 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
247 VMOVN.I16 D19,Q7 @vmovn_s16(pi2_tmp_cur_row.val[1])
253 VMOVN.I16 D0,Q0 @II vmovn_s16(pi2_tmp_cur_row.val[0])
260 VMOVN.I16 D1,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1])
336 VMOVN.I16 D28,Q14 @vmovn_s16(pi2_tmp_cur_row.val[0])
|
| D | ihevc_sao_edge_offset_class0_chroma.s | 97 VMOV.I16 Q2,#0 @const_min_clip = vdupq_n_s16(0)
101 VMOV.I16 Q3,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
250 VMOVN.I16 D14,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
252 VMOVN.I16 D15,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1])
278 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0])
279 VMOVN.I16 D29,Q15 @II vmovn_s16(pi2_tmp_cur_row.val[1])
405 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
430 VMOVN.I16 D28,Q12 @II vmovn_s16(pi2_tmp_cur_row.val[0])
|
| D | ihevc_sao_edge_offset_class3.s | 206 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
210 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
351 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
355 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1])
461 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0])
464 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1])
476 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
480 VMOVN.I16 D21,Q11 @III vmovn_s16(pi2_tmp_cur_row.val[1])
540 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
543 VMOVN.I16 D21,Q11 @vmovn_s16(pi2_tmp_cur_row.val[1])
[all …]
|
| D | ihevc_sao_edge_offset_class2.s | 194 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
198 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
329 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
336 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1])
435 VMOVN.I16 D26,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
437 VMOVN.I16 D27,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1])
441 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
448 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1])
503 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
506 VMOVN.I16 D21,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1])
[all …]
|
| D | ihevc_sao_edge_offset_class3_chroma.s | 286 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
287 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
442 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
446 VMOVN.I16 D21,Q9 @I vmovn_s16(pi2_tmp_cur_row.val[1])
571 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0])
581 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1])
596 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
600 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1])
671 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
675 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1])
[all …]
|
| D | ihevc_sao_edge_offset_class2_chroma.s | 277 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0)
281 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1)
451 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
462 VMOVN.I16 D21,Q9 @I vmovn_s16(pi2_tmp_cur_row.val[1])
577 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0])
579 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1])
599 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
608 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1])
668 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0])
672 VMOVN.I16 D21,Q9 @vmovn_s16(pi2_tmp_cur_row.val[1])
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | fp16-v8-instructions.ll | 375 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
377 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
378 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h
389 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
391 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
402 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
404 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
405 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h
416 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
418 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/ |
| D | arith.ll | 27 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
46 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
65 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
84 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, un…
103 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, u…
122 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, u…
141 ; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
160 ; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
179 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, und…
199 %I16 = add i16 undef, undef
[all …]
|
| D | fptosi.ll | 94 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi double undef t…
101 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi double undef t…
108 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi double und…
115 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi double un…
122 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi double unde…
128 %I16 = fptosi double undef to i16
251 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi float undef to…
258 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi float undef to…
265 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi float undef…
272 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptosi float undef…
[all …]
|
| D | fptoui.ll | 101 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui double undef t…
108 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui double undef t…
115 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui double und…
122 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui double un…
129 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui double unde…
135 %I16 = fptoui double undef to i16
272 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui float undef to…
279 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui float undef to…
286 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui float undef…
293 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = fptoui float undef…
[all …]
|
| D | rem.ll | 24 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, und…
43 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, un…
63 %I16 = srem i16 undef, undef
86 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, und…
105 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, un…
125 %I16 = urem i16 undef, undef
148 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, 7
167 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = srem i16 undef, 7
187 %I16 = srem i16 undef, 7
210 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = urem i16 undef, 7
[all …]
|
| D | div.ll | 24 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, und…
43 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, un…
63 %I16 = sdiv i16 undef, undef
86 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, und…
105 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, un…
125 %I16 = udiv i16 undef, undef
148 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, 7
167 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sdiv i16 undef, 7
187 %I16 = sdiv i16 undef, 7
210 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, 7
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | fp16-v8-instructions.ll | 399 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
401 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
402 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h
413 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
415 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
426 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
428 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
429 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h
440 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]]
442 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
|
| /external/libxkbcommon/xkbcommon/test/data/keycodes/ |
| D | xfree86 | 185 <I16> = 150;
345 alias <COPY> = <I16>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/ |
| D | llvm-stress-s2704903805.ll | 44 %I16 = insertelement <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, i64 81222, i32 1
62 %Cmp26 = icmp ult <4 x i64> %I16, %Shuff15
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| D | llvm-stress-s2704903805.ll | 44 %I16 = insertelement <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, i64 81222, i32 1
62 %Cmp26 = icmp ult <4 x i64> %I16, %Shuff15
|
| /external/libxkbcommon/xkbcommon/test/data/symbols/ |
| D | inet | 55 key <I16> { [ XF86Sleep ] };
238 key <I16> { [ XF86Mail ] };
790 key <I16> { [ XF86AudioMedia ] };
1009 key <I16> { [ XF86ScrollClick ] };
1195 key <I16> { [ XF86LogOff ] };
1413 key <I16> { [ XF86LogOff ] };
1564 key <I16> { [ XF86AudioRaiseVolume ] };
1625 key <I16> { [ XF86WakeUp ] };
1822 key <I16> { [ XF86WakeUp ] };
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| D | nouveau_render_t.c | 128 EMIT_VBO(I16, ctx, start, delta, n & ~1); in dispatch_i16()
|
| /external/vixl/examples/aarch32/ |
| D | mandelbrot.cc | 159 __ Vmovn(I16, kLowerFlags, kFlags); in GenerateMandelBrot()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPULibFunc.cpp | 636 case 's': res.ArgType = AMDGPULibFunc::I16; break; in parseItaniumParam()
742 case AMDGPULibFunc::I16: return "s"; in getItaniumTypeName()
889 case AMDGPULibFunc::I16: T = Type::getInt16Ty(C); break; in getIntrinsicParamType()
|
| /external/flatbuffers/tests/MyGame/Example/ |
| D | TypeAliases.lua | 38 function TypeAliases_mt:I16() function
|