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Searched refs:I2C2_BASE_ADDR (Results 1 – 17 of 17) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-stv0991/
Dhardware.h51 #define I2C2_BASE_ADDR 0x80402000UL macro
/external/u-boot/drivers/i2c/
Dmxc_i2c.c579 #if !defined(I2C2_BASE_ADDR)
580 #define I2C2_BASE_ADDR 0 macro
611 { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG },
620 { 1, I2C2_BASE_ADDR, 0 },
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dconfig.h53 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000) macro
/external/u-boot/arch/arm/mach-imx/
Di2c-mxv7.c65 (void *)I2C2_BASE_ADDR,
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dsoc.c280 #ifdef I2C2_BASE_ADDR in erratum_a009203()
281 ptr = (u8 __iomem *)(I2C2_BASE_ADDR + I2C_DEBUG_REG); in erratum_a009203()
/external/u-boot/arch/arm/include/asm/arch-mx35/
Dimx-regs.h34 #define I2C2_BASE_ADDR 0x43F98000 macro
/external/u-boot/arch/arm/include/asm/arch-s32v234/
Dimx-regs.h88 #define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0X00003A000) macro
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch3.h45 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) macro
Dimmap_lsch2.h75 #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000) macro
/external/u-boot/arch/arm/include/asm/arch-mx27/
Dimx-regs.h192 #define I2C2_BASE_ADDR (0x1D000 + IMX_IO_BASE) macro
/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dimx-regs.h82 #define I2C2_BASE_ADDR 0x30A30000 macro
/external/u-boot/arch/arm/include/asm/arch-mx5/
Dimx-regs.h108 #define I2C2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) macro
/external/u-boot/arch/arm/include/asm/arch-mx25/
Dimx-regs.h301 #define I2C2_BASE_ADDR (0x43F98000) macro
/external/u-boot/arch/arm/include/asm/arch-vf610/
Dimx-regs.h78 #define I2C2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00067000) macro
/external/u-boot/arch/arm/include/asm/arch-mx31/
Dimx-regs.h614 #define I2C2_BASE_ADDR 0x43F98000 macro
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h264 #define I2C2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x24000) macro
/external/u-boot/arch/arm/include/asm/arch-mx7/
Dimx-regs.h174 #define I2C2_BASE_ADDR (AIPS3_OFF_BASE_ADDR+0x30000) macro