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Searched refs:I2C_ADAP_HWNR (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/include/configs/
Dstrider.h411 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0200 : 0x0040)
412 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0100 : 0x0020)
413 #define I2C_FPGA_IDX ((I2C_ADAP_HWNR > 3) ? \
414 (I2C_ADAP_HWNR - 4) : I2C_ADAP_HWNR)
416 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
417 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
418 #define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
422 #define I2C_FPGA_IDX I2C_ADAP_HWNR
428 if (I2C_ADAP_HWNR > 7) \
Dhrcon.h390 #define I2C_SDA_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
391 #define I2C_SCL_GPIO ((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
392 #define I2C_FPGA_IDX (I2C_ADAP_HWNR % 4)
397 if (I2C_ADAP_HWNR > 7) \
/external/u-boot/drivers/i2c/
Dihs_i2c.c40 if (I2C_ADAP_HWNR & 0x10) \
41 FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
43 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
47 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
53 if (I2C_ADAP_HWNR & 0x10) \
54 FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
56 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
60 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
/external/u-boot/include/
Di2c.h646 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) macro