Searched refs:ICC_CTLR_EL1 (Results 1 – 7 of 7) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 97 #define ICC_CTLR_EL1 S3_0_C12_C12_4 macro
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| /external/u-boot/arch/arm/lib/ |
| D | gic_64.S | 130 msr ICC_CTLR_EL1, xzr /* NonSecure ICC_CTLR_EL1 */
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 27 # CHECK: mrs x23, {{icc_ctlr_el1|ICC_CTLR_EL1}}
135 # CHECK: msr {{icc_ctlr_el1|ICC_CTLR_EL1}}, x24
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 27 # CHECK: mrs x23, {{icc_ctlr_el1|ICC_CTLR_EL1}}
135 # CHECK: msr {{icc_ctlr_el1|ICC_CTLR_EL1}}, x24
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 693 ICC_CTLR_EL1 = 50788,
2520 { "ICC_CTLR_EL1", 0xC664, true, true, {} }, // 538
2972 { "ICC_CTLR_EL1", 538 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 888 def : RWSysReg<"ICC_CTLR_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b100>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1058 def : RWSysReg<"ICC_CTLR_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b100>;
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