Searched refs:ICC_HPPIR1_EL1 (Results 1 – 6 of 6) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 91 #define ICC_HPPIR1_EL1 S3_0_C12_C12_2 macro
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 9 # CHECK: mrs x2, {{icc_hppir1_el1|ICC_HPPIR1_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 9 # CHECK: mrs x2, {{icc_hppir1_el1|ICC_HPPIR1_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 245 ICC_HPPIR1_EL1 = 50786,
2072 { "ICC_HPPIR1_EL1", 0xC662, true, false, {} }, // 90
2978 { "ICC_HPPIR1_EL1", 90 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 408 def : ROSysReg<"ICC_HPPIR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b010>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 572 def : ROSysReg<"ICC_HPPIR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b010>;
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