Searched refs:ICC_IAR1_EL1 (Results 1 – 7 of 7) sorted by relevance
| /external/u-boot/arch/arm/include/asm/ |
| D | gic.h | 87 #define ICC_IAR1_EL1 S3_0_C12_C12_0 macro
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| D | macro.h | 316 mrs \xreg1, ICC_IAR1_EL1
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 5 # CHECK: mrs x8, {{icc_iar1_el1|ICC_IAR1_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | gicv3-regs.txt | 5 # CHECK: mrs x8, {{icc_iar1_el1|ICC_IAR1_EL1}}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 243 ICC_IAR1_EL1 = 50784,
2070 { "ICC_IAR1_EL1", 0xC660, true, false, {} }, // 88
2980 { "ICC_IAR1_EL1", 88 },
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 406 def : ROSysReg<"ICC_IAR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b000>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 570 def : ROSysReg<"ICC_IAR1_EL1", 0b11, 0b000, 0b1100, 0b1100, 0b000>;
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