Searched refs:ICC_IGRPEN1_EL3 (Results 1 – 7 of 7) sorted by relevance
/external/u-boot/arch/arm/include/asm/ |
D | gic.h | 104 #define ICC_IGRPEN1_EL3 S3_6_C12_C12_7 macro
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/external/u-boot/arch/arm/lib/ |
D | gic_64.S | 124 msr ICC_IGRPEN1_EL3, x10
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | gicv3-regs.txt | 41 # CHECK: mrs x7, {{icc_igrpen1_el3|ICC_IGRPEN1_EL3}} 149 # CHECK: msr {{icc_igrpen1_el3|ICC_IGRPEN1_EL3}}, x8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | gicv3-regs.txt | 41 # CHECK: mrs x7, {{icc_igrpen1_el3|ICC_IGRPEN1_EL3}} 149 # CHECK: msr {{icc_igrpen1_el3|ICC_IGRPEN1_EL3}}, x8
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenSystemOperands.inc | 700 ICC_IGRPEN1_EL3 = 63079, 2527 { "ICC_IGRPEN1_EL3", 0xF667, true, true, {} }, // 545 2983 { "ICC_IGRPEN1_EL3", 545 },
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 895 def : RWSysReg<"ICC_IGRPEN1_EL3", 0b11, 0b110, 0b1100, 0b1100, 0b111>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 1065 def : RWSysReg<"ICC_IGRPEN1_EL3", 0b11, 0b110, 0b1100, 0b1100, 0b111>;
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