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Searched refs:ICC_SRE_EL3 (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/arch/arm/lib/
Dgic_64.S111 mrs x10, ICC_SRE_EL3
114 msr ICC_SRE_EL3, x10
/external/u-boot/arch/arm/include/asm/
Dgic.h101 #define ICC_SRE_EL3 S3_6_C12_C12_5 macro
/external/llvm/test/MC/Disassembler/AArch64/
Dgicv3-regs.txt35 # CHECK: mrs x8, {{icc_sre_el3|ICC_SRE_EL3}}
143 # CHECK: msr {{icc_sre_el3|ICC_SRE_EL3}}, x10
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dgicv3-regs.txt35 # CHECK: mrs x8, {{icc_sre_el3|ICC_SRE_EL3}}
143 # CHECK: msr {{icc_sre_el3|ICC_SRE_EL3}}, x10
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc697 ICC_SRE_EL3 = 63077,
2524 { "ICC_SRE_EL3", 0xF665, true, true, {} }, // 542
2991 { "ICC_SRE_EL3", 542 },
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td892 def : RWSysReg<"ICC_SRE_EL3", 0b11, 0b110, 0b1100, 0b1100, 0b101>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1062 def : RWSysReg<"ICC_SRE_EL3", 0b11, 0b110, 0b1100, 0b1100, 0b101>;