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Searched refs:IDC_CERR2 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc8xx/
Dcpu.c118 while (!((m = rd_ic_cst()) & IDC_CERR2)) { in checkicache()
158 while (!((m = rd_dc_cst()) & IDC_CERR2)) { in checkdcache()
/external/u-boot/arch/powerpc/include/asm/
Dcache.h105 #define IDC_CERR2 0x00100000 /* Cache error 2 */ macro