• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2016 Google, Inc
4  */
5 
6 #ifndef __asm_pch_common_h
7 #define __asm_pch_common_h
8 
9 /* Common Intel SATA registers */
10 #define SATA_SIRI		0xa0 /* SATA Indexed Register Index */
11 #define SATA_SIRD		0xa4 /* SATA Indexed Register Data */
12 #define SATA_SP			0xd0 /* Scratchpad */
13 
14 #define INTR_LN			0x3c
15 #define IDE_TIM_PRI		0x40	/* IDE timings, primary */
16 #define   IDE_DECODE_ENABLE	(1 << 15)
17 #define   IDE_SITRE		(1 << 14)
18 #define   IDE_ISP_5_CLOCKS	(0 << 12)
19 #define   IDE_ISP_4_CLOCKS	(1 << 12)
20 #define   IDE_ISP_3_CLOCKS	(2 << 12)
21 #define   IDE_RCT_4_CLOCKS	(0 <<  8)
22 #define   IDE_RCT_3_CLOCKS	(1 <<  8)
23 #define   IDE_RCT_2_CLOCKS	(2 <<  8)
24 #define   IDE_RCT_1_CLOCKS	(3 <<  8)
25 #define   IDE_DTE1		(1 <<  7)
26 #define   IDE_PPE1		(1 <<  6)
27 #define   IDE_IE1		(1 <<  5)
28 #define   IDE_TIME1		(1 <<  4)
29 #define   IDE_DTE0		(1 <<  3)
30 #define   IDE_PPE0		(1 <<  2)
31 #define   IDE_IE0		(1 <<  1)
32 #define   IDE_TIME0		(1 <<  0)
33 #define IDE_TIM_SEC		0x42	/* IDE timings, secondary */
34 
35 #define SERIRQ_CNTL		0x64
36 
37 /**
38  * pch_common_sir_read() - Read from a SATA indexed register
39  *
40  * @dev:	SATA device
41  * @idx:	Register index to read
42  * @return value read from register
43  */
44 u32 pch_common_sir_read(struct udevice *dev, int idx);
45 
46 /**
47  * pch_common_sir_write() - Write to a SATA indexed register
48  *
49  * @dev:	SATA device
50  * @idx:	Register index to write
51  * @value:	Value to write
52  */
53 void pch_common_sir_write(struct udevice *dev, int idx, u32 value);
54 
55 #endif
56