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Searched refs:IMM (Results 1 – 25 of 130) sorted by relevance

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/external/virglrenderer/tests/
Dlarge_shader.h14 IMM[0] FLT32 {0x40000000, 0xbf800000, 0x00000000, 0x3f7fffff}
15 IMM[1] FLT32 {0xbf3504f4, 0x3f3504f4, 0x00000000, 0x3fb504f3}
16 IMM[2] FLT32 {0xbf87c3b7, 0x80000000, 0xbf733333, 0x41000000}
17 IMM[3] UINT32 {0, 4294967295, 0, 0}
18 IMM[4] INT32 {0, 32, 1, 0}
19 IMM[5] FLT32 {0x3f6e147b, 0x00000000, 0x40400000, 0x42e20000}
20 IMM[6] FLT32 {0x42640000, 0x3f000000, 0x472aee8c, 0x3f800000}
21 IMM[7] FLT32 {0x42680000, 0x42e40000, 0x432a0000, 0x432b0000}
22 IMM[8] FLT32 {0xbf19999a, 0xbef5c28f, 0x3f23d70a, 0x400147ae}
23 IMM[9] FLT32 {0xbf4ccccd, 0x3eb851ec, 0xbef5c28f, 0x3e800000}
[all …]
/external/swiftshader/third_party/LLVM/utils/TableGen/
DEDEmitter.cpp246 #define IMM(str) if (name == str) SET("kOperandTypeImmediate"); macro
280 IMM("i8imm"); in X86TypeFromOpName()
281 IMM("i16imm"); in X86TypeFromOpName()
282 IMM("i16i8imm"); in X86TypeFromOpName()
283 IMM("i32imm"); in X86TypeFromOpName()
284 IMM("i32i8imm"); in X86TypeFromOpName()
285 IMM("u32u8imm"); in X86TypeFromOpName()
286 IMM("i64imm"); in X86TypeFromOpName()
287 IMM("i64i8imm"); in X86TypeFromOpName()
288 IMM("i64i32imm"); in X86TypeFromOpName()
[all …]
/external/iproute2/include/
Dbpf_util.h88 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
94 .imm = IMM })
96 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
102 .imm = IMM })
124 #define BPF_MOV64_IMM(DST, IMM) \ argument
130 .imm = IMM })
132 #define BPF_MOV32_IMM(DST, IMM) \ argument
138 .imm = IMM })
141 #define BPF_LD_IMM64(DST, IMM) \ argument
142 BPF_LD_IMM64_RAW(DST, 0, IMM)
[all …]
/external/bcc/src/cc/
Dlibbpf.h145 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
151 .imm = IMM })
153 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
159 .imm = IMM })
173 #define BPF_MOV64_IMM(DST, IMM) \ argument
179 .imm = IMM })
182 #define BPF_LD_IMM64(DST, IMM) \ argument
183 BPF_LD_IMM64_RAW(DST, 0, IMM)
185 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \ argument
191 .imm = (__u32) (IMM) }), \
[all …]
/external/bcc/src/cc/includes/
Dlibbpf.h145 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
151 .imm = IMM })
153 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
159 .imm = IMM })
173 #define BPF_MOV64_IMM(DST, IMM) \ argument
179 .imm = IMM })
182 #define BPF_LD_IMM64(DST, IMM) \ argument
183 BPF_LD_IMM64_RAW(DST, 0, IMM)
185 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \ argument
191 .imm = (__u32) (IMM) }), \
[all …]
/external/mesa3d/src/gallium/tests/graw/vertex-shader/
Dvert-arr.sh11 IMM FLT32 { 3.0, 1.0, 1.0, 1.0 }
12 IMM FLT32 { 1.0, 0.0, 0.0, 1.0 }
13 IMM FLT32 { 0.0, 1.0, 0.0, 1.0 }
14 IMM FLT32 { 0.0, 0.0, 1.0, 1.0 }
15 IMM FLT32 { 1.0, 1.0, 0.0, 1.0 }
16 IMM FLT32 { 0.0, 1.0, 1.0, 1.0 }
19 MUL TEMP[0], IN[0], IMM[0]
21 MOV OUT[1], IMM[ADDR[0].x + 3]
Dvert-arl.sh11 IMM FLT32 { 3.0, 1.0, 1.0, 1.0 }
12 IMM FLT32 { 1.0, 0.0, 0.0, 1.0 }
13 IMM FLT32 { 0.0, 1.0, 0.0, 1.0 }
14 IMM FLT32 { 0.0, 0.0, 1.0, 1.0 }
15 IMM FLT32 { 1.0, 1.0, 0.0, 1.0 }
16 IMM FLT32 { 0.0, 1.0, 1.0, 1.0 }
19 MUL TEMP[0], IN[0], IMM[0]
21 MOV OUT[1], IMM[ADDR[0].x + 3]
Dvert-flr.sh11 IMM FLT32 { 3.0, 1.0, 1.0, 1.0 }
12 IMM FLT32 { 1.0, 0.0, 0.0, 1.0 }
13 IMM FLT32 { 0.0, 1.0, 0.0, 1.0 }
14 IMM FLT32 { 0.0, 0.0, 1.0, 1.0 }
15 IMM FLT32 { 1.0, 1.0, 0.0, 1.0 }
16 IMM FLT32 { 0.0, 1.0, 1.0, 1.0 }
19 MUL TEMP[0], IN[0], IMM[0]
21 MOV OUT[1], IMM[ADDR[0].x + 3]
Dvert-mad.sh8 IMM FLT32 { 0.5, 1.0, 1.0, 1.0 }
9 IMM FLT32 { 0.5, 0.0, 0.0, 0.0 }
11 MAD OUT[0], IN[0], IMM[0], IMM[1]
Dvert-lg2.sh10 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
11 IMM FLT32 { 0.5, 0.0, 0.0, 0.0 }
13 ADD TEMP[0], IN[0], IMM[0]
15 ADD OUT[0], TEMP[0], IMM[1]
Dvert-rcp.sh10 IMM[0] FLT32 { 1.0, 0.0, 0.0, 0.0 }
11 IMM[1] FLT32 { 1.5, 0.0, 0.0, 0.0 }
13 ADD TEMP[0], IN[0], IMM[0]
15 SUB OUT[0], TEMP[0], IMM[1]
Dvert-rsq.sh10 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
11 IMM FLT32 { 1.5, 0.0, 0.0, 0.0 }
13 ADD TEMP[0], IN[0], IMM[0]
15 SUB OUT[0], TEMP[0], IMM[1]
/external/mesa3d/src/gallium/tests/python/tests/regress/fragment-shader/
Dfrag-cmp.sh6 IMM FLT32 { 1, 0, 0, 1 }
7 IMM FLT32 { 0, 1, 1, 0 }
8 IMM FLT32 { 1, 0,-1, 0 }
10 CMP OUT[0], IMM[2], IMM[0], IMM[1]
/external/pcre/dist2/src/sljit/
DsljitNativeSPARC_32.c30 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst)); in load_immediate()
36 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2))
58 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst)); in emit_single_op()
59 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst))); in emit_single_op()
60 return push_inst(compiler, SRA | D(dst) | S1(dst) | IMM(24), DR(dst)); in emit_single_op()
70 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst))); in emit_single_op()
71 …return push_inst(compiler, (op == SLJIT_MOV_S16 ? SRA : SRL) | D(dst) | S1(dst) | IMM(16), DR(dst)… in emit_single_op()
86 FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
87 FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(-1), DR(dst))); in emit_single_op()
91 FAIL_IF(push_inst(compiler, SLL | D(TMP_REG1) | S1(TMP_REG1) | IMM(1), DR(TMP_REG1))); in emit_single_op()
[all …]
DsljitNativeMIPS_32.c32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
37 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
38 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
44 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
46 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
96 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
115 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
140 return push_inst(compiler, XORI | SA(EQUAL_FLAG) | TA(EQUAL_FLAG) | IMM(1), EQUAL_FLAG); in emit_single_op()
145 FAIL_IF(push_inst(compiler, BEQ | S(TMP_REG1) | TA(0) | IMM(5), UNMOVABLE_INS)); in emit_single_op()
[all …]
DsljitNativeMIPS_64.c38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
45 …return (imm & 0xffff) ? push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(imm), dst_ar) : SL… in load_immediate()
79 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
81 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 32), dst_ar)); in load_immediate()
89 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
114 FAIL_IF(push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
118 …return !(imm & 0xffff) ? SLJIT_SUCCESS : push_inst(compiler, ORI | SA(dst_ar) | TA(dst_ar) | IMM(i… in load_immediate()
127 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
[all …]
DsljitNativePPC_64.c52 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
58 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
70 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
76 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
77 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp >> 32))); in load_immediate()
87 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
93 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
96 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(tmp2)) : SLJIT_SUCCESS; in load_immediate()
[all …]
/external/mesa3d/src/gallium/tests/graw/fragment-shader/
Dfrag-kil.sh8 IMM FLT32 { 0.6, 0.6, 0.6, 0.0 }
9 IMM FLT32 { 0.01, 0.0, 0.0, 0.0 }
10 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
12 SLT TEMP[0], IN[0], IMM[0]
14 MOV OUT[0].w, IMM[2].xxxx
15 SUB TEMP[0], TEMP[0], IMM[1].xxxy
Dfrag-ucmp.sh5 IMM[0] FLT32 { 10.0000, 1.0000, 0.0000, 0.0000}
6 IMM[1] UINT32 {1, 0, 0, 0}
7 0: MUL TEMP[0].x, IN[0].xxxx, IMM[0].xxxx
9 2: AND TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx
10 3: UCMP OUT[0], TEMP[0].xxxx, IMM[0].yzzz, IMM[0].yyyz
Dfrag-mad.sh6 IMM FLT32 { 0.5, 0.4, 0.6, 1.0 }
7 IMM FLT32 { 0.5, 0.4, 0.6, 0.0 }
9 MAD OUT[0], IN[0], IMM[0], IMM[1]
Dfrag-srcmod-absneg.sh8 IMM FLT32 { -0.2, -0.3, -0.4, 0.0 }
9 IMM FLT32 { -1.0, -1.0, -1.0, -1.0 }
11 ADD TEMP[0], IN[0], IMM[0]
13 MUL OUT[0], TEMP[0], IMM[1]
Dfrag-flr.sh8 IMM FLT32 { 2.5, 4.0, 2.0, 1.0 }
9 IMM FLT32 { 0.4, 0.25, 0.5, 1.0 }
11 MUL TEMP[0], IN[0], IMM[0]
13 MUL OUT[0], TEMP[0], IMM[1]
Dfrag-rcp.sh8 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
9 IMM FLT32 { 1.5, 0.0, 0.0, 0.0 }
11 ADD TEMP[0], IN[0], IMM[0]
13 SUB OUT[0], TEMP[0], IMM[1]
Dfrag-lg2.sh8 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
9 IMM FLT32 { 0.5, 0.0, 0.0, 0.0 }
11 ADD TEMP[0], IN[0], IMM[0]
13 ADD OUT[0], TEMP[0], IMM[1]
Dfrag-rsq.sh8 IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
9 IMM FLT32 { 1.5, 0.0, 0.0, 0.0 }
11 ADD TEMP[0], IN[0], IMM[0]
13 SUB OUT[0], TEMP[0], IMM[1]

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