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Searched refs:IND (Results 1 – 25 of 47) sorted by relevance

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/external/e2fsprogs/tests/d_fallocate_blkmap/
Dexpect26 (0-1):1312-1313, (2-11):8000-8009, (IND):8010, (12-39):8011-8038
38 …IND):10012, (12-267):10013-10268, (DIND):10269, (IND):10270, (268-523):10271-10526, (IND):10527, (…
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_maos_verts.c63 #define DO_W (IND & RADEON_CP_VC_FRMT_W0)
64 #define DO_RGBA (IND & RADEON_CP_VC_FRMT_PKCOLOR)
65 #define DO_SPEC_OR_FOG (IND & RADEON_CP_VC_FRMT_PKSPEC)
66 #define DO_SPEC ((IND & RADEON_CP_VC_FRMT_PKSPEC) && \
68 #define DO_FOG ((IND & RADEON_CP_VC_FRMT_PKSPEC) && ctx->Fog.Enabled && \
70 #define DO_TEX0 ((IND & RADEON_CP_VC_FRMT_ST0) != 0)
71 #define DO_TEX1 ((IND & RADEON_CP_VC_FRMT_ST1) != 0)
72 #define DO_TEX2 ((IND & RADEON_CP_VC_FRMT_ST2) != 0)
73 #define DO_PTEX ((IND & RADEON_CP_VC_FRMT_Q0) != 0)
74 #define DO_NORM ((IND & RADEON_CP_VC_FRMT_N0) != 0)
[all …]
Dradeon_swtcl.c535 #define DO_UNFILLED ((IND & RADEON_UNFILLED_BIT) != 0)
536 #define DO_TWOSIDE ((IND & RADEON_TWOSIDE_BIT) != 0)
617 #undef IND
625 #define IND (0) macro
629 #define IND (RADEON_TWOSIDE_BIT) macro
633 #define IND (RADEON_UNFILLED_BIT) macro
637 #define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT) macro
Dradeon_maos_vbtmp.h293 setup_tab[IDX].vertex_format = IND; in TAG()
298 #undef IND
/external/mesa3d/src/mesa/swrast_setup/
Dss_tritmp.h51 if (IND & (SS_TWOSIDE_BIT | SS_OFFSET_BIT | SS_UNFILLED_BIT)) in TAG()
59 if (IND & (SS_TWOSIDE_BIT | SS_UNFILLED_BIT)) in TAG()
63 if (IND & SS_UNFILLED_BIT) in TAG()
67 if (IND & SS_TWOSIDE_BIT) { in TAG()
131 if (IND & SS_OFFSET_BIT) { in TAG()
157 if ((IND & SS_OFFSET_BIT) && ctx->Polygon.OffsetPoint) { in TAG()
164 if ((IND & SS_OFFSET_BIT) && ctx->Polygon.OffsetLine) { in TAG()
171 if ((IND & SS_OFFSET_BIT) && ctx->Polygon.OffsetFill) { in TAG()
182 if (IND & SS_OFFSET_BIT) { in TAG()
188 if (IND & SS_TWOSIDE_BIT) { in TAG()
[all …]
Dss_triangle.c167 #define IND (0) macro
171 #define IND (SS_OFFSET_BIT) macro
175 #define IND (SS_TWOSIDE_BIT) macro
179 #define IND (SS_OFFSET_BIT|SS_TWOSIDE_BIT) macro
183 #define IND (SS_UNFILLED_BIT) macro
187 #define IND (SS_OFFSET_BIT|SS_UNFILLED_BIT) macro
191 #define IND (SS_TWOSIDE_BIT|SS_UNFILLED_BIT) macro
195 #define IND (SS_OFFSET_BIT|SS_TWOSIDE_BIT|SS_UNFILLED_BIT) macro
/external/llvm/test/Transforms/LoopVectorize/
Dinduction.ll2 … -force-vector-interleave=1 -force-vector-width=2 -instcombine -S | FileCheck %s --check-prefix=IND
39 ; IND-LABEL: scalar_use
41 ; IND: br label %vector.body
42 ; IND: vector.body:
44 ; IND-NOT: insertelement <2 x i64>
45 ; IND-NOT: shufflevector <2 x i64>
46 ; IND: br {{.*}}, label %vector.body
97 ; IND-LABEL: @scalarize_induction_variable_01(
98 ; IND: vector.body:
99 ; IND: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
[all …]
Dif-pred-stores.ll65 ; UNROLL: %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0
67 ; UNROLL: %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/
Dinduction.ll2 … -force-vector-interleave=1 -force-vector-width=2 -instcombine -S | FileCheck %s --check-prefix=IND
47 ; IND-LABEL: scalar_use
49 ; IND: br label %vector.body
50 ; IND: vector.body:
52 ; IND-NOT: insertelement <2 x i64>
53 ; IND-NOT: shufflevector <2 x i64>
54 ; IND: br {{.*}}, label %vector.body
99 ; IND-LABEL: @scalarize_induction_variable_01(
100 ; IND: vector.body:
101 ; IND: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CodeGenPrepare/X86/
Dfcmp-sinking.ll19 %IND = phi i32 [ 0, %entry ], [ %IND.new, %body1 ]
20 %CMP = icmp slt i32 %IND, 1250
25 %IND.new = add i32 %IND, 1
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dfcmp-sinking.ll19 %IND = phi i32 [ 0, %entry ], [ %IND.new, %body1 ]
20 %CMP = icmp slt i32 %IND, 1250
25 %IND.new = add i32 %IND, 1
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_tris.c602 #define DO_FALLBACK ((IND & INTEL_FALLBACK_BIT) != 0)
603 #define DO_OFFSET ((IND & INTEL_OFFSET_BIT) != 0)
604 #define DO_UNFILLED ((IND & INTEL_UNFILLED_BIT) != 0)
605 #define DO_TWOSIDE ((IND & INTEL_TWOSIDE_BIT) != 0)
685 #define IND INTEL_FALLBACK_BIT macro
687 #undef IND
693 #define IND (0) macro
697 #define IND (INTEL_OFFSET_BIT) macro
701 #define IND (INTEL_TWOSIDE_BIT) macro
705 #define IND (INTEL_TWOSIDE_BIT|INTEL_OFFSET_BIT) macro
[all …]
/external/llvm/test/Transforms/LICM/
Dhoist-round.ll28 %IND = phi i32 [ 0, %entry ], [ %IND.new, %for.body ]
29 %CMP = icmp slt i32 %IND, 10
44 %IND.new = add i32 %IND, 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LICM/
Dhoist-round.ll29 %IND = phi i32 [ 0, %entry ], [ %IND.new, %for.body ]
30 %CMP = icmp slt i32 %IND, 10
46 %IND.new = add i32 %IND, 1
/external/e2fsprogs/tests/f_convert_bmap/
Dexpect.114 (0-11):1025-1036, (IND):24, (12-267):1037-1292, (DIND):25, (IND):41, (268-511):1293-1536
/external/e2fsprogs/tests/f_convert_bmap_and_extent/
Dexpect.114 (0-11):1025-1036, (IND):24, (12-267):1037-1292, (DIND):25, (IND):41, (268-511):1293-1536
/external/wpa_supplicant_8/hostapd/
Dhlr_auc_gw.txt27 [-D<DB file>] [-i<IND len in bits>]
37 -i<IND len in bits> = IND length for SQN (default: 5)
/external/mesa3d/src/mesa/tnl_dd/
Dt_dd_tritmp.h660 TAB[IND].quad = TAG(quadr); in TAG()
663 TAB[IND].triangle = TAG(triangle); in TAG()
666 TAB[IND].line = TAG(line); in TAG()
669 TAB[IND].points = TAG(points); in TAG()
673 #undef IND
/external/e2fsprogs/tests/f_itable_collision/
Dname1 collision between IND/extent tree blocks and inode table
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_swtcl.c412 #define DO_UNFILLED ((IND & R200_UNFILLED_BIT) != 0)
413 #define DO_TWOSIDE ((IND & R200_TWOSIDE_BIT) != 0)
495 #undef IND
503 #define IND (0) macro
507 #define IND (R200_TWOSIDE_BIT) macro
511 #define IND (R200_UNFILLED_BIT) macro
515 #define IND (R200_TWOSIDE_BIT|R200_UNFILLED_BIT) macro
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dadv-switch-opt.ll41 ; CHECK: sub [[IND:[^,]+]],0x5b
42 ; CHECK-NEXT: cmp [[IND]],0x8
44 ; X8632-NEXT: mov [[TARGET:.*]],DWORD PTR {{\[}}[[IND]]*4+0x0] {{[0-9a-f]+}}: R_386_32 .{{.*}}testJ…
46 ; X8664-NEXT: mov {{.}}[[TARGET:.*]],DWORD PTR {{\[}}[[IND]]*4+0x0] {{[0-9a-f]+}}: R_X86_64_32S .{{…
/external/e2fsprogs/tests/f_convert_bmap_sparse/
Dexpect.112 (0):513, (4-8):514-518, (IND):58, (20):2005
/external/deqp-deps/glslang/Test/baseResults/
Dhlsl.inf.vert.out46 0:10 1.#IND
104 0:10 1.#IND
/external/harfbuzz_ng/src/
Dhb-ot-shape-complex-use-machine.rl47 IND = 3; # BASE_IND
128 independent_cluster = (IND | O | Rsv | WJ) VS?;
Dhb-ot-shape-complex-use-table.cc28 #define IND USE_IND /* BASE_IND */ macro
105 …, VBlw, VBlw, VBlw, O, O, VPre, VPre, O, O, VPst, VPst, H, IND, O,
145 …/* 0B80 */ O, O, VMAbv, IND, O, B, B, B, B, B, B, O, …
183 …/* 0D50 */ O, O, O, O, IND, IND, IND, VPst, O, O, O, O, …
185 …, O, O, O, O, O, O, O, O, IND, IND, IND, IND, IND, IND,
209 …/* 0F80 */ VBlw, VAbv, VMAbv, VMAbv, VBlw, IND, VMAbv, VMAbv, B, B, B, B, …
805 #undef IND

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