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Searched refs:INSTR (Results 1 – 19 of 19) sorted by relevance

/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Ddisasm-a2xx.c129 #define INSTR(opc, num_srcs) [opc] = { num_srcs, #opc } macro
130 INSTR(ADDv, 2),
131 INSTR(MULv, 2),
132 INSTR(MAXv, 2),
133 INSTR(MINv, 2),
134 INSTR(SETEv, 2),
135 INSTR(SETGTv, 2),
136 INSTR(SETGTEv, 2),
137 INSTR(SETNEv, 2),
138 INSTR(FRACv, 1),
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Drv32-relaxation.s2 # RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=INSTR %s
4 # RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=RELAX-INSTR %s
21 #INSTR: c.bnez a0, 72
22 #RELAX-INSTR: c.bnez a0, 0
25 #INSTR: c.bnez a0, -4
26 #RELAX-INSTR: c.bnez a0, 0
29 #INSTR-NEXT: bne a0, zero, 326
30 #RELAX-INSTR-NEXT: bne a0, zero, 0
33 #INSTR-NEXT: bne a0, zero, -268
34 #RELAX-INSTR-NEXT: bne a0, zero, 0
[all …]
Drv64-relaxation.s2 # RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=INSTR %s
4 # RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=RELAX-INSTR %s
21 #INSTR: c.bnez a0, 56
22 #RELAX-INSTR: c.bnez a0, 0
25 #INSTR: c.bnez a0, -4
26 #RELAX-INSTR: c.bnez a0, 0
29 #INSTR-NEXT: bne a0, zero, 310
30 #RELAX-INSTR-NEXT: bne a0, zero, 0
33 #INSTR-NEXT: bne a0, zero, -268
34 #RELAX-INSTR-NEXT: bne a0, zero, 0
[all …]
Dtail-call.s2 # RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
9 # RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
19 # INSTR: auipc t1, 0
20 # INSTR: jr t1
24 # INSTR: auipc t1, 0
25 # INSTR: jr t1
33 # INSTR: auipc t1, 0
34 # INSTR: jr t1
39 # INSTR: auipc t1, 0
40 # INSTR: jr t1
[all …]
Dfunction-call.s2 # RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
12 # INSTR: auipc ra, 0
13 # INSTR: jalr ra
17 # INSTR: auipc ra, 0
18 # INSTR: jalr ra
25 # INSTR: auipc ra, 0
26 # INSTR: jalr ra
31 # INSTR: auipc ra, 0
32 # INSTR: jalr ra
37 # INSTR: auipc ra, 0
[all …]
Dfixups.s5 # RUN: | FileCheck -check-prefix=CHECK-INSTR %s
15 # CHECK-INSTR: lui t1, 74565
19 # CHECK-INSTR: lw a0, 1656(t1)
22 # CHECK-INSTR: addi a1, t1, 1656
25 # CHECK-INSTR: sw a0, 1656(t1)
29 # CHECK-INSTR: jal zero, -16
32 # CHECK-INSTR: jal zero, 330996
35 # CHECK-INSTR: beq a0, a1, -24
38 # CHECK-INSTR: blt a0, a1, 1108
59 # CHECK-INSTR: auipc ra, 0
[all …]
Drelocations.s2 # RUN: | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
9 # INSTR - Check the instruction is handled properly by the ASMPrinter
19 # INSTR: lui t1, %hi(foo)
24 # INSTR: lui t1, %hi(foo+4)
29 # INSTR: addi t1, t1, %lo(foo)
34 # INSTR: addi t1, t1, %lo(foo+4)
39 # INSTR: sb t1, %lo(foo)(a2)
44 # INSTR: sb t1, %lo(foo+4)(a2)
49 # INSTR: auipc t1, %pcrel_hi(foo)
54 # INSTR: auipc t1, %pcrel_hi(foo+4)
[all …]
Dfixups-compressed.s4 # RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=CHECK-INSTR %s
10 # CHECK-INSTR: c.j 0
13 # CHECK-INSTR: c.jal 6
16 # CHECK-INSTR: c.beqz a3, -4
19 # CHECK-INSTR: c.bnez a5, -6
Dhilo-constaddr-expr.s4 # RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=CHECK-INSTR
20 # CHECK-INSTR: lui t0, 48
21 # CHECK-INSTR: lw ra, 292(t0)
28 # CHECK-INSTR: lui t1, 0
29 # CHECK-INSTR: lw sp, -8(t1)
Dcompressed-relocations.s2 # RUN: | FileCheck -check-prefix=INSTR -check-prefix=FIXUP %s
11 # INSTR - Check the instruction is handled properly by the ASMPrinter
15 # INSTR: c.jal foo
21 # INSTR: c.bnez a0, foo
Dhilo-constaddr.s2 # RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=CHECK-INSTR
14 # CHECK-INSTR: lui t0, 912092
15 # CHECK-INSTR: lw ra, -273(t0)
/external/llvm/test/MC/Mips/
Dhilo-addressing.s5 # RUN: | llvm-objdump -disassemble - | FileCheck %s -check-prefix=CHECK-INSTR
29 # CHECK-INSTR: lui $4, 3
30 # CHECK-INSTR: addiu $4, $4, 292
35 # CHECK-INSTR: lui $5, 0
36 # CHECK-INSTR: lw $5, -8($5)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dhilo-addressing.s5 # RUN: | llvm-objdump -disassemble - | FileCheck %s -check-prefix=CHECK-INSTR
29 # CHECK-INSTR: lui $4, 3
30 # CHECK-INSTR: addiu $4, $4, 292
35 # CHECK-INSTR: lui $5, 0
36 # CHECK-INSTR: lw $5, -8($5)
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler.c1747 #define INSTR(n, f, ...) \ macro
1750 INSTR(MOV, trans_instr, .opc = INST_OPCODE_MOV, .src = {2, -1, -1}),
1751 INSTR(RCP, trans_instr, .opc = INST_OPCODE_RCP, .src = {2, -1, -1}),
1752 INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}),
1753 INSTR(MUL, trans_instr, .opc = INST_OPCODE_MUL, .src = {0, 1, -1}),
1754 INSTR(ADD, trans_instr, .opc = INST_OPCODE_ADD, .src = {0, 2, -1}),
1755 INSTR(DP2, trans_instr, .opc = INST_OPCODE_DP2, .src = {0, 1, -1}),
1756 INSTR(DP3, trans_instr, .opc = INST_OPCODE_DP3, .src = {0, 1, -1}),
1757 INSTR(DP4, trans_instr, .opc = INST_OPCODE_DP4, .src = {0, 1, -1}),
1758 INSTR(DST, trans_instr, .opc = INST_OPCODE_DST, .src = {0, 1, -1}),
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dtrap.ll1 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=INSTR
8 ; INSTR: t:
9 ; INSTR: trap
/external/epid-sdk/ext/ipp/sources/include/
Dia_32e.inc2265 posgpr INSTR <x>,<ygpr>
2287 posxmm INSTR <x>,<yxmm>
2675 bracket INSTR <src>,<[>
2677 memtype INSTR <src>,<oword>
2679 memtype INSTR <src>,<OWORD>
2686 bracket INSTR <dst>,<[>
2688 memtype INSTR <dst>,<oword>
2690 memtype INSTR <dst>,<OWORD>
2795 posgpr INSTR <x>,<ygpr>
2806 posgpr INSTR <x>,<ygpr>
[all …]
Dia_emm.inc1804 posx INSTR <x>,<y>
1941 posgpr INSTR <x>,<ygpr>
2040 posx INSTR <x>,<y>
/external/webp/src/dsp/
Dmsa_macro.h72 #define MSA_LOAD_FUNC(TYPE, INSTR, FUNC_NAME) \ argument
77 "" #INSTR " %[val_m], %[psrc_m] \n\t" \
85 #define MSA_STORE_FUNC(TYPE, INSTR, FUNC_NAME) \ argument
90 " " #INSTR " %[val_m], %[pdst_m] \n\t" \
/external/honggfuzz/docs/
DUSAGE.md192 | Linux,NetBSD | **SIGSEGV.PC.4ba1ae.STACK.13599d485.CODE.1.ADDR.0x10.INSTR.mov____0x10(%rbx),%rax.…
201 …* **INSTR.mov____0x10(%rbx),%rax`** - Disassembled instruction which was found under the last know…