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Searched refs:IN_408_OUT_48_DIVISOR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-tegra/
Dclk_rst.h275 IN_408_OUT_48_DIVISOR = 15, enumerator
/external/u-boot/arch/arm/mach-tegra/
Dclock.c795 reg = (IN_408_OUT_48_DIVISOR << PLLP_OUT2_RATIO) in tegra30_set_up_pllp()