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Searched refs:IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/board/ge/mx53ppd/
Dmx53ppd_video.c96 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | in lcd_enable()
/external/u-boot/board/aristainetos/
Daristainetos-v2.c462 | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT in enable_lvds()
554 | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT in enable_spi_display()
/external/u-boot/board/kosagi/novena/
Dvideo.c416 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | in setup_display_clock()
/external/u-boot/board/ge/bx50v3/
Dbx50v3.c484 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | in setup_display_b850v3()
527 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | in setup_display_bx50v3()
/external/u-boot/board/boundary/nitrogen6x/
Dnitrogen6x.c482 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; in enable_lvds()
492 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT in enable_lvds_jeida()
/external/u-boot/board/embest/mx6boards/
Dmx6boards.c382 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT); in enable_lvds()
/external/u-boot/arch/arm/include/asm/arch-mx5/
Dimx-regs.h435 #define IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT (IOMUXC_GPR2_DATA_WIDTH_24 << \ macro
/external/u-boot/board/advantech/dms-ba16/
Ddms-ba16.c421 IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | in setup_display()
/external/u-boot/board/toradex/apalis_imx6/
Dapalis_imx6.c585 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; in enable_lvds()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h649 #define IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT (IOMUXC_GPR2_DATA_WIDTH_24<<IOMUXC_GPR2_DATA_WIDTH_CH0_OF… macro
/external/u-boot/board/gateworks/gw_ventana/
Dgw_ventana.c332 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; in enable_lvds()