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Searched refs:IP3_7_4 (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c103 #define GPSR2_2 F_(VI0_HSYNC_N, IP3_7_4)
178 #define IP3_7_4 FM(VI0_HSYNC_N) FM(MSIOF2_TXD) FM(TX3) F_(0, 0) FM(HRTS3_N) F_(0, 0) F_(0, 0)… macro
260 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
488 PINMUX_IPSR_GPSR(IP3_7_4, VI0_HSYNC_N),
489 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
490 PINMUX_IPSR_GPSR(IP3_7_4, TX3),
491 PINMUX_IPSR_GPSR(IP3_7_4, HRTS3_N),
2296 IP3_7_4
Dpfc-r8a77990.c83 #define GPSR1_2 F_(A2, IP3_7_4)
214 #define IP3_7_4 FM(A2) FM(IRQ2) FM(AVB_AVTP_PPS) FM(VI4_CLKENB) FM(VI5_DATA1_A) FM(DU_DISP) F… macro
362 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
645 PINMUX_IPSR_GPSR(IP3_7_4, A2),
646 PINMUX_IPSR_GPSR(IP3_7_4, IRQ2),
647 PINMUX_IPSR_GPSR(IP3_7_4, AVB_AVTP_PPS),
648 PINMUX_IPSR_GPSR(IP3_7_4, VI4_CLKENB),
649 PINMUX_IPSR_MSEL(IP3_7_4, VI5_DATA1_A, SEL_VIN5_0),
650 PINMUX_IPSR_GPSR(IP3_7_4, DU_DISP),
651 PINMUX_IPSR_MSEL(IP3_7_4, SCL6_B, SEL_I2C6_1),
[all …]
Dpfc-r8a77995.c61 #define GPSR1_18 F_(DU_DR2, IP3_7_4)
226 #define IP3_7_4 FM(DU_DR2) FM(LCDOUT18) FM(PWM0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro
352 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
624 PINMUX_IPSR_GPSR(IP3_7_4, DU_DR2),
625 PINMUX_IPSR_GPSR(IP3_7_4, LCDOUT18),
626 PINMUX_IPSR_MSEL(IP3_7_4, PWM0_B, SEL_PWM0_2),
2298 IP3_7_4
Dpfc-r8a7795.c75 #define GPSR1_10 F_(A10, IP3_7_4)
239 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, … macro
404 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
762 PINMUX_IPSR_GPSR(IP3_7_4, A10),
763 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
764 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
765 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
5392 IP3_7_4
Dpfc-r8a7796.c81 #define GPSR1_10 F_(A10, IP3_7_4)
243 #define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, … macro
410 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
764 PINMUX_IPSR_GPSR(IP3_7_4, A10),
765 PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0),
766 PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_B, SEL_SCIF4_1),
767 PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N),
5336 IP3_7_4
Dpfc-r8a7790.c948 PINMUX_IPSR_GPSR(IP3_7_4, A12),
949 PINMUX_IPSR_MSEL(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1),
950 PINMUX_IPSR_GPSR(IP3_7_4, MSIOF2_TXD),
951 PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1, SEL_VI1_0),
952 PINMUX_IPSR_MSEL(IP3_7_4, VI1_R1_B, SEL_VI1_1),
953 PINMUX_IPSR_GPSR(IP3_7_4, VI2_G1),
954 PINMUX_IPSR_MSEL(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1),