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Searched refs:IP7_31_28 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/pinctrl/renesas/
Dpfc-r8a77970.c66 #define GPSR1_20 F_(AVB0_AVTP_CAPTURE, IP7_31_28)
216 #define IP7_31_28 FM(AVB0_AVTP_CAPTURE) F_(0, 0) F_(0, 0) F_(0, 0) FM(FSCLKST2_N_B) F_(0, 0) F_(0… macro
275 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
685 PINMUX_IPSR_GPSR(IP7_31_28, AVB0_AVTP_CAPTURE),
686 PINMUX_IPSR_GPSR(IP7_31_28, FSCLKST2_N_B),
2330 IP7_31_28
Dpfc-r8a77995.c87 #define GPSR2_26 F_(VI4_HSYNC_N, IP7_31_28)
266 #define IP7_31_28 FM(VI4_HSYNC_N) FM(RX1_B) F_(0, 0) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(… macro
367 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
763 PINMUX_IPSR_GPSR(IP7_31_28, VI4_HSYNC_N),
764 PINMUX_IPSR_MSEL(IP7_31_28, RX1_B, SEL_SCIF1_1),
765 PINMUX_IPSR_GPSR(IP7_31_28, NFDATA9),
2332 IP7_31_28
Dpfc-r8a77990.c131 #define GPSR3_0 F_(SD0_CLK, IP7_31_28)
254 #define IP7_31_28 FM(SD0_CLK) FM(NFDATA8) FM(SCL1_C) FM(HSCK1_B) FM(SDA2_E) FM(FMCLK_B) F_(0, … macro
377 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
939 PINMUX_IPSR_GPSR(IP7_31_28, SD0_CLK),
940 PINMUX_IPSR_GPSR(IP7_31_28, NFDATA8),
941 PINMUX_IPSR_MSEL(IP7_31_28, SCL1_C, SEL_I2C1_2),
942 PINMUX_IPSR_MSEL(IP7_31_28, HSCK1_B, SEL_HSCIF1_1),
943 PINMUX_IPSR_MSEL(IP7_31_28, SDA2_E, SEL_I2C2_4),
944 PINMUX_IPSR_MSEL(IP7_31_28, FMCLK_B, SEL_FM_1),
5002 IP7_31_28
Dpfc-r8a7795.c117 #define GPSR3_3 F_(SD0_DAT1, IP7_31_28)
278 #define IP7_31_28 FM(SD0_DAT1) F_(0, 0) FM(MSIOF1_TXD_E) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_B)FM(ST… macro
419 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
995 PINMUX_IPSR_GPSR(IP7_31_28, SD0_DAT1),
996 PINMUX_IPSR_MSEL(IP7_31_28, MSIOF1_TXD_E, SEL_MSIOF1_4),
997 PINMUX_IPSR_MSEL(IP7_31_28, TS_SPSYNC0_B, SEL_TSIF0_1),
998 PINMUX_IPSR_MSEL(IP7_31_28, STP_ISSYNC_0_B, SEL_SSP1_0_1),
5426 IP7_31_28
Dpfc-r8a7796.c123 #define GPSR3_3 F_(SD0_DAT1, IP7_31_28)
284 #define IP7_31_28 FM(SD0_DAT1) F_(0, 0) FM(MSIOF1_TXD_E) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_B)FM(ST… macro
425 FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \
997 PINMUX_IPSR_GPSR(IP7_31_28, SD0_DAT1),
998 PINMUX_IPSR_MSEL(IP7_31_28, MSIOF1_TXD_E, SEL_MSIOF1_4),
999 PINMUX_IPSR_MSEL(IP7_31_28, TS_SPSYNC0_B, SEL_TSIF0_1),
1000 PINMUX_IPSR_MSEL(IP7_31_28, STP_ISSYNC_0_B, SEL_SSP1_0_1),
5370 IP7_31_28