Searched refs:IReg (Results 1 – 4 of 4) sorted by relevance
/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1126 unsigned IReg = SP::I0 + Offset/8; in fixupVariableFloatArgs() local 1130 IReg, MVT::i64, CCValAssign::BCvt); in fixupVariableFloatArgs() 1136 IReg, MVT::i128, CCValAssign::BCvt); in fixupVariableFloatArgs()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1112 unsigned IReg = SP::I0 + Offset/8; in fixupVariableFloatArgs() local 1116 IReg, MVT::i64, CCValAssign::BCvt); in fixupVariableFloatArgs() 1122 IReg, MVT::i128, CCValAssign::BCvt); in fixupVariableFloatArgs()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 28405 unsigned IReg = MRI->createVirtualRegister(&X86::GR32_NOSPRegClass); in EmitSjLjDispatchBlock() local 28406 addFrameReference(BuildMI(DispatchBB, DL, TII->get(X86::MOV32rm), IReg), FI, in EmitSjLjDispatchBlock() 28409 .addReg(IReg) in EmitSjLjDispatchBlock() 28427 .addReg(IReg) in EmitSjLjDispatchBlock() 28470 .addReg(IReg) in EmitSjLjDispatchBlock()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 24092 unsigned IReg = MRI->createVirtualRegister(&X86::GR32RegClass); in EmitSjLjDispatchBlock() local 24093 addFrameReference(BuildMI(DispatchBB, DL, TII->get(X86::MOV32rm), IReg), FI, in EmitSjLjDispatchBlock() 24096 .addReg(IReg) in EmitSjLjDispatchBlock() 24102 .addReg(IReg) in EmitSjLjDispatchBlock()
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