| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetLowering.h | 434 getIndexedLoadAction(unsigned IdxMode, EVT VT) const { in getIndexedLoadAction() argument
435 assert(IdxMode < ISD::LAST_INDEXED_MODE && in getIndexedLoadAction()
439 return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] & 0xf0) >> 4); in getIndexedLoadAction()
444 bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const { in isIndexedLoadLegal() argument
446 (getIndexedLoadAction(IdxMode, VT) == Legal || in isIndexedLoadLegal()
447 getIndexedLoadAction(IdxMode, VT) == Custom); in isIndexedLoadLegal()
455 getIndexedStoreAction(unsigned IdxMode, EVT VT) const { in getIndexedStoreAction() argument
456 assert(IdxMode < ISD::LAST_INDEXED_MODE && in getIndexedStoreAction()
460 return (LegalizeAction)(IndexedModeActions[Ty][IdxMode] & 0x0f); in getIndexedStoreAction()
465 bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const { in isIndexedStoreLegal() argument
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 710 getIndexedLoadAction(unsigned IdxMode, MVT VT) const { in getIndexedLoadAction() argument
711 assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() && in getIndexedLoadAction()
714 return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] & 0xf0) >> 4); in getIndexedLoadAction()
718 bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const { in isIndexedLoadLegal() argument
720 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedLoadLegal()
721 getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom); in isIndexedLoadLegal()
728 getIndexedStoreAction(unsigned IdxMode, MVT VT) const { in getIndexedStoreAction() argument
729 assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() && in getIndexedStoreAction()
732 return (LegalizeAction)(IndexedModeActions[Ty][IdxMode] & 0x0f); in getIndexedStoreAction()
736 bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const { in isIndexedStoreLegal() argument
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| /external/capstone/arch/ARM/ |
| D | ARMAddressingModes.h | 443 unsigned IdxMode) in ARM_AM_getAM2Opc() argument
447 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ; in ARM_AM_getAM2Opc()
486 unsigned IdxMode) in getAM3Opc() argument
489 return ((int)isSub << 8) | Offset | (IdxMode << 9); in getAM3Opc()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 407 unsigned IdxMode = 0) {
410 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
442 unsigned IdxMode = 0) {
444 return ((int)isSub << 8) | Offset | (IdxMode << 9);
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 997 getIndexedLoadAction(unsigned IdxMode, MVT VT) const { in getIndexedLoadAction() argument
998 assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() && in getIndexedLoadAction()
1001 return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] & 0xf0) >> 4); in getIndexedLoadAction()
1005 bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const { in isIndexedLoadLegal() argument
1007 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedLoadLegal()
1008 getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom); in isIndexedLoadLegal()
1015 getIndexedStoreAction(unsigned IdxMode, MVT VT) const { in getIndexedStoreAction() argument
1016 assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() && in getIndexedStoreAction()
1019 return (LegalizeAction)(IndexedModeActions[Ty][IdxMode] & 0x0f); in getIndexedStoreAction()
1023 bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const { in isIndexedStoreLegal() argument
[all …]
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 408 unsigned IdxMode = 0) {
411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
443 unsigned IdxMode = 0) {
445 return ((int)isSub << 8) | Offset | (IdxMode << 9);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 398 unsigned IdxMode = 0) {
401 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
430 unsigned IdxMode = 0) {
432 return ((int)isSub << 8) | Offset | (IdxMode << 9);
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 357 unsigned IdxMode = ARM_AM::getAM2IdxMode(MO3.getImm()); in printAddrMode2Operand() local
359 if (IdxMode == ARMII::IndexModePost) { in printAddrMode2Operand()
437 unsigned IdxMode = ARM_AM::getAM3IdxMode(MO3.getImm()); in printAddrMode3Operand() local
439 if (IdxMode == ARMII::IndexModePost) { in printAddrMode3Operand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 456 unsigned IdxMode = ARM_AM::getAM2IdxMode(MO3.getImm()); in printAddrMode2Operand() local
457 assert(IdxMode != ARMII::IndexModePost && "Should be pre or offset index op"); in printAddrMode2Operand()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 444 unsigned IdxMode = ARM_AM::getAM2IdxMode(MO3.getImm()); in printAddrMode2Operand() local
445 assert(IdxMode != ARMII::IndexModePost && "Should be pre or offset index op"); in printAddrMode2Operand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2869 unsigned IdxMode = IsIndirectSrc ? in emitLoadM0FromVGPRLoop() local
2874 .addImm(IdxMode); in emitLoadM0FromVGPRLoop()
3000 unsigned IdxMode = IsIndirectSrc ? in setM0ToIndexFromSGPR() local
3006 .addImm(IdxMode); in setM0ToIndexFromSGPR()
3017 .addImm(IdxMode); in setM0ToIndexFromSGPR()
|