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Searched refs:Imm4 (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1621 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1631 TmpInst.addOperand(Imm4); in processInstruction()
1641 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1651 TmpInst.addOperand(Imm4); in processInstruction()
1661 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1671 TmpInst.addOperand(Imm4); in processInstruction()
/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1845 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1853 TmpInst.addOperand(Imm4); in processInstruction()
1864 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1872 TmpInst.addOperand(Imm4); in processInstruction()
1883 MCOperand &Imm4 = Inst.getOperand(3); in processInstruction() local
1891 TmpInst.addOperand(Imm4); in processInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCodeEmitter.cpp1863 unsigned Imm4 = Imm & 0xf; in emitNEON1RegModImmInstruction() local
1864 Binary |= (I << 24) | (Imm3 << 16) | (Cmode << 8) | (Op << 5) | Imm4; in emitNEON1RegModImmInstruction()
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp3438 IValueT Imm4 = 0; in vdup() local
3444 Imm4 = 1 | ((Idx & 0x7) << 1); in vdup()
3449 Imm4 = 2 | ((Idx & 0x3) << 2); in vdup()
3455 Imm4 = 4 | ((Idx & 0x1) << 3); in vdup()
3462 emitSIMDBase(VdupOpcode, Dd, Imm4, Dn + (Lower ? 0 : 1), UseQRegs, IsFloatTy); in vdup()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonPatterns.td2271 // First, match the unusual case of doubleword store into Reg+Imm4, i.e.
2272 // a store where the offset Imm4 is a multiple of 4, but not of 8. This