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Searched refs:ImplicitUses (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrDesc.h143 const unsigned *ImplicitUses; // Registers implicitly read by this instr variable
211 return ImplicitUses; in getImplicitUses()
217 if (ImplicitUses == 0) return 0; in getNumImplicitUses()
219 for (; ImplicitUses[i]; ++i) /*empty*/; in getNumImplicitUses()
249 if (const unsigned *ImpUses = ImplicitUses) in hasImplicitUseOfPhysReg()
/external/llvm/include/llvm/MC/
DMCInstrDesc.h147 const MCPhysReg *ImplicitUses; // Registers implicitly read by this instr variable
475 const MCPhysReg *getImplicitUses() const { return ImplicitUses; } in getImplicitUses()
479 if (!ImplicitUses) in getNumImplicitUses()
482 for (; ImplicitUses[i]; ++i) /*empty*/ in getNumImplicitUses()
512 if (const MCPhysReg *ImpUses = ImplicitUses) in hasImplicitUseOfPhysReg()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCInstrDesc.h171 const MCPhysReg *ImplicitUses; // Registers implicitly read by this instr variable
517 const MCPhysReg *getImplicitUses() const { return ImplicitUses; } in getImplicitUses()
521 if (!ImplicitUses) in getNumImplicitUses()
524 for (; ImplicitUses[i]; ++i) /*empty*/ in getNumImplicitUses()
554 if (const MCPhysReg *ImpUses = ImplicitUses) in hasImplicitUseOfPhysReg()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DInstrDocsEmitter.cpp204 if (!II->ImplicitUses.empty()) { in EmitInstrDocs()
207 for (Record *Use : II->ImplicitUses) { in EmitInstrDocs()
DCodeGenInstruction.h221 std::vector<Record*> ImplicitDefs, ImplicitUses; variable
DCodeGenInstruction.cpp348 ImplicitUses = R->getValueAsListOfDefs("Uses"); in CodeGenInstruction()
DGlobalISelEmitter.cpp2563 if (!I->ImplicitDefs.empty() || !I->ImplicitUses.empty()) { in emitActionOpcodes()
2573 for (auto Use : I->ImplicitUses) { in emitActionOpcodes()
/external/capstone/
DMCInstrDesc.h131 char ImplicitUses; // Registers implicitly read by this instr member
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenInstruction.h216 std::vector<Record*> ImplicitDefs, ImplicitUses; variable
DCodeGenInstruction.cpp323 ImplicitUses = R->getValueAsListOfDefs("Uses"); in CodeGenInstruction()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h221 std::vector<Record*> ImplicitDefs, ImplicitUses; variable
DCodeGenInstruction.cpp343 ImplicitUses = R->getValueAsListOfDefs("Uses"); in CodeGenInstruction()
/external/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp130 if (const MCPhysReg *R = D.ImplicitUses) in getDefsUses()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenMux.cpp167 if (const MCPhysReg *R = D.ImplicitUses) in getDefsUses()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DMachineInstr.cpp478 if (MCID->ImplicitUses) in addImplicitDefUseOperands()
479 for (const unsigned *ImpUses = MCID->ImplicitUses; *ImpUses; ++ImpUses) in addImplicitDefUseOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachineInstr.cpp106 if (MCID->ImplicitUses) in addImplicitDefUseOperands()
/external/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp771 if (MCID.ImplicitUses) in verifyImplicitOperands()
/external/llvm/lib/CodeGen/
DMachineInstr.cpp643 if (MCID->ImplicitUses) in addImplicitDefUseOperands()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp1787 if (NewDesc.ImplicitUses) in optimizeCompareInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp920 if (MCID.ImplicitUses) in verifyImplicitOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp1948 if (NewDesc.ImplicitUses) in optimizeCompareInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp2216 unsigned Reg = Desc.ImplicitUses[i]; in findImplicitSGPRReadInVOP()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DCodeGenerator.rst1298 ``TargetInstrInfo::get(opcode)::ImplicitUses``. Pre-colored registers impose
/external/llvm/docs/
DCodeGenerator.rst1298 ``TargetInstrInfo::get(opcode)::ImplicitUses``. Pre-colored registers impose