| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 72 unsigned InReg = MI->getOperand(1).getReg(); in processBlock() local
76 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock()
106 .addReg(InReg); in processBlock()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCTLSDynamicCall.cpp | 83 unsigned InReg = MI.getOperand(1).getReg(); in processBlock() local
87 const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; in processBlock()
122 .addReg(InReg); in processBlock()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetCallingConv.h | 27 static const uint64_t InReg = 1ULL<<2; ///< Passed in register member
56 bool isInReg() const { return Flags & InReg; } in isInReg()
|
| /external/clang/include/clang/CodeGen/ |
| D | CGFunctionInfo.h | 96 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
113 : TheKind(K), PaddingInReg(false), InReg(false) { in ABIArgInfo()
119 TheKind(Direct), PaddingInReg(false), InReg(false) {} in ABIArgInfo()
300 return InReg; in getInReg()
305 InReg = IR; in setInReg()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetCallingConv.h | 32 static const uint64_t InReg = 1ULL<<2; ///< Passed in register member
76 bool isInReg() const { return Flags & InReg; } in isInReg()
|
| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Attributes.h | 40 const Attributes InReg = 1<<3; ///< Force argument to be passed in register variable
102 ByVal | InReg | Nest | StructRet,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 207 unsigned InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
245 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
246 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
256 Tmp0 = InReg; in LowerFPToInt()
259 .addReg(InReg); in LowerFPToInt()
269 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
292 .addReg(InReg); in LowerFPToInt()
|
| /external/mesa3d/src/amd/common/ |
| D | ac_llvm_helper.cpp | 64 AS.hasAttribute(ArgNo + 1, llvm::Attribute::InReg); in ac_is_sgpr_param()
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
| D | Attributes.inc | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Attributes.gen | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
| D | Attributes.gen | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Attributes.gen | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Attributes.gen | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Attributes.gen | 14 InReg,
71 .Case("inreg", Attribute::InReg)
204 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | VirtRegRewriter.cpp | 1808 unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId); in InsertRestores() local
1809 if (InReg == Phys) { in InsertRestores()
1818 << TRI->getName(InReg) << " for " << PrintReg(VirtReg) in InsertRestores()
1827 } else if (InReg && InReg != Phys) { in InsertRestores()
1834 << TRI->getName(InReg) << " for " << PrintReg(VirtReg) in InsertRestores()
1847 .addReg(InReg, RegState::Kill); in InsertRestores()
2359 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) { in RewriteMBB() local
2361 if (DestReg != InReg) { in RewriteMBB()
2366 .addReg(InReg, RegState::Kill); in RewriteMBB()
2377 Spills.disallowClobberPhysReg(InReg); in RewriteMBB()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/IR/ |
| D | AttributesCompatFunc.inc | 14 InReg,
77 .Case("inreg", Attribute::InReg)
216 return llvm::Attribute::InReg;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
| D | Attributes.inc | 14 InReg,
77 .Case("inreg", Attribute::InReg)
216 return llvm::Attribute::InReg;
|
| /external/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 104 IsInReg = Call.paramHasAttr(0, Attribute::InReg); in setCallee()
128 IsInReg = Call.paramHasAttr(0, Attribute::InReg);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 111 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
135 IsInReg = Call.hasRetAttr(Attribute::InReg);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CallLowering.cpp | 70 if (Attrs.hasAttribute(OpIdx, Attribute::InReg)) in setArgFlags()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetTransformInfo.cpp | 297 if (F->getAttributes().hasAttribute(A->getArgNo() + 1, Attribute::InReg) || in isArgPassedInSGPR()
|
| /external/swiftshader/third_party/LLVM/lib/VMCore/ |
| D | Attributes.cpp | 43 if (Attrs & Attribute::InReg) in getAsString()
|
| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 924 bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
1430 bool &InReg, in shouldAggregateUseDirect() argument
1439 InReg = !IsMCUABI; in shouldAggregateUseDirect()
1523 bool InReg; in classifyArgumentType() local
1524 if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) { in classifyArgumentType()
1528 if (InReg) in classifyArgumentType()
1572 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
1575 if (InReg) in classifyArgumentType()
1580 if (InReg) in classifyArgumentType()
6852 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
[all …]
|
| /external/llvm/include/llvm/IR/ |
| D | Attributes.td | 62 def InReg : EnumAttr<"inreg">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 336 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
|