Searched refs:InsIndex (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2646 for (unsigned I = 0, InsIndex = 0, E = RVLocs.size(); I != E; in LowerCallResult() local
2647 ++I, ++InsIndex) { in LowerCallResult()
2661 ((Is64Bit || Ins[InsIndex].Flags.isInReg()) && !Subtarget.hasSSE1())) { in LowerCallResult()
3050 for (unsigned I = 0, InsIndex = 0, E = ArgLocs.size(); I != E; in LowerFormalArguments() local
3051 ++I, ++InsIndex) { in LowerFormalArguments()
3052 assert(InsIndex < Ins.size() && "Invalid Ins index"); in LowerFormalArguments()
3137 LowerMemArgument(Chain, CallConv, Ins, dl, DAG, VA, MFI, InsIndex); in LowerFormalArguments()
8386 SDValue InsIndex; in LowerBUILD_VECTOR() local
8394 assert(!VarElt.getNode() && !InsIndex.getNode() && in LowerBUILD_VECTOR()
8397 InsIndex = DAG.getConstant(i, dl, getVectorIdxTy(DAG.getDataLayout())); in LowerBUILD_VECTOR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 429 SDValue combineInsertEltToShuffle(SDNode *N, unsigned InsIndex);
14919 SDValue DAGCombiner::combineInsertEltToShuffle(SDNode *N, unsigned InsIndex) { in combineInsertEltToShuffle() argument
14940 if (i / NumSrcElts == InsIndex) in combineInsertEltToShuffle()
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