/external/v8/src/mips/ |
D | constants-mips.h | 1238 inline Instr InstructionBits() const { in InstructionBits() function 1249 return (InstructionBits() >> nr) & 1; in Bit() 1254 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 1308 return InstructionBits() & kFunctionFieldMask; in FunctionFieldRaw() 1313 return static_cast<Opcode>(InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1318 return InstructionBits() & kRsFieldMask; in RsFieldRawNoAssert() 1321 inline int SaFieldRaw() const { return InstructionBits() & kSaFieldMask; } in SaFieldRaw() 1336 return (((this->InstructionBits() & kMsaI5I10Mask) == LDI) in MSAMinorOpcodeField() 1477 return static_cast<Opcode>(this->InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1483 return this->InstructionBits() & kRsFieldMask; in RsFieldRaw() [all …]
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D | disasm-mips.cc | 611 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in PrintMsaDataFormat() 1297 if (0x0 == static_cast<int>(instr->InstructionBits())) in DecodeTypeRegisterSPECIAL() 2052 uint32_t opcode = instr->InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 2091 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 2133 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 2142 uint32_t opcode = instr->InstructionBits() & kMsaELMMask; in DecodeTypeMsaELM() 2189 uint32_t opcode = instr->InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 2234 uint32_t opcode = instr->InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() 2249 uint32_t opcode = instr->InstructionBits() & kMsa3RMask; in DecodeTypeMsa3R() 2446 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in DecodeTypeMsa3RF() [all …]
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D | simulator-mips.cc | 191 sim_->break_instr_ = breakpc->InstructionBits(); in SetBreakpoint() 392 instr->InstructionBits() == rtCallRedirInstr) { in Debug() 2210 if (instr_.InstructionBits() == rtCallRedirInstr) { in SoftwareInterrupt() 4294 uint32_t opcode = instr_.InstructionBits() & kMsa3RFMask; in DecodeMsaDataFormat() 4328 uint32_t opcode = instr_.InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 4478 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 4514 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 4551 uint32_t opcode = instr_.InstructionBits() & kMsaLongerELMMask; in DecodeTypeMsaELM() 4783 uint32_t opcode = instr_.InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 4824 uint32_t opcode = instr_.InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() [all …]
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D | simulator-mips.h | 475 if (instr->InstructionBits() == nopInstr) { in BranchDelayInstructionDecode()
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/external/v8/src/s390/ |
D | assembler-s390-inl.h | 61 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc_)); in apply() 138 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in code_target_object_handle_at() 246 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in target_address_at() 258 SixByteInstr instr_2 = Instruction::InstructionBits( in target_address_at() 307 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in set_target_address_at() 327 SixByteInstr instr_2 = Instruction::InstructionBits( in set_target_address_at()
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D | constants-s390.h | 1838 inline T InstructionBits() const { in InstructionBits() function 1839 return Instruction::InstructionBits<T>(reinterpret_cast<const byte*>(this)); in InstructionBits() 1841 inline Instr InstructionBits() const { in InstructionBits() function 1856 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 1860 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 1866 return (InstructionBits<T>() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 1871 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField() 1913 static inline uint64_t InstructionBits(const byte* instr) { in InstructionBits() function 1916 return static_cast<uint64_t>(InstructionBits<TwoByteInstr>(instr)); in InstructionBits() 1918 return static_cast<uint64_t>(InstructionBits<FourByteInstr>(instr)); in InstructionBits() [all …]
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D | disasm-s390.cc | 907 "%04x ", instr->InstructionBits<TwoByteInstr>()); in InstructionDecode() 910 "%08x ", instr->InstructionBits<FourByteInstr>()); in InstructionDecode() 913 "%012" PRIx64 " ", instr->InstructionBits<SixByteInstr>()); in InstructionDecode()
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D | assembler-s390.cc | 339 Instruction::InstructionBits(reinterpret_cast<const byte*>(pc)); in AllocateAndInstallRequestedHeapObjects()
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D | assembler-s390.h | 1515 return Instruction::InstructionBits(buffer_ + pos); in instr_at() 1528 return Instruction::InstructionBits(pc); in instr_at()
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D | simulator-s390.cc | 142 sim_->break_instr_ = break_pc->InstructionBits(); in SetBreakpoint() 230 ->InstructionBits() == 0x7D821008) { in Debug() 276 ->InstructionBits() == 0x7D821008) { in Debug() 3546 SixByteInstr the_instr = Instruction::InstructionBits( in EVALUATE()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 1272 inline Instr InstructionBits() const { in InstructionBits() function 1283 return (InstructionBits() >> nr) & 1; in Bit() 1288 return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1); in Bits() 1355 return InstructionBits() & kFunctionFieldMask; in FunctionFieldRaw() 1360 return static_cast<Opcode>(InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1365 return InstructionBits() & kRsFieldMask; in RsFieldRawNoAssert() 1368 inline int SaFieldRaw() const { return InstructionBits() & kSaFieldMask; } in SaFieldRaw() 1383 return (((this->InstructionBits() & kMsaI5I10Mask) == LDI) in MSAMinorOpcodeField() 1529 return static_cast<Opcode>(this->InstructionBits() & kOpcodeMask); in OpcodeFieldRaw() 1535 return this->InstructionBits() & kRsFieldMask; in RsFieldRaw() [all …]
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D | disasm-mips64.cc | 652 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in PrintMsaDataFormat() 1435 if (0x0 == static_cast<int>(instr->InstructionBits())) in DecodeTypeRegisterSPECIAL() 2366 uint32_t opcode = instr->InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 2405 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 2447 uint32_t opcode = instr->InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 2456 uint32_t opcode = instr->InstructionBits() & kMsaELMMask; in DecodeTypeMsaELM() 2503 uint32_t opcode = instr->InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 2548 uint32_t opcode = instr->InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() 2563 uint32_t opcode = instr->InstructionBits() & kMsa3RMask; in DecodeTypeMsa3R() 2760 uint32_t opcode = instr->InstructionBits() & kMsa3RFMask; in DecodeTypeMsa3RF() [all …]
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D | simulator-mips64.cc | 173 sim_->break_instr_ = breakpc->InstructionBits(); in SetBreakpoint() 357 instr->InstructionBits() == rtCallRedirInstr) { in Debug() 2164 if (instr_.InstructionBits() == rtCallRedirInstr) { in SoftwareInterrupt() 4505 uint32_t opcode = instr_.InstructionBits() & kMsa3RFMask; in DecodeMsaDataFormat() 4539 uint32_t opcode = instr_.InstructionBits() & kMsaI8Mask; in DecodeTypeMsaI8() 4689 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI5() 4725 uint32_t opcode = instr_.InstructionBits() & kMsaI5Mask; in DecodeTypeMsaI10() 4762 uint32_t opcode = instr_.InstructionBits() & kMsaLongerELMMask; in DecodeTypeMsaELM() 5008 uint32_t opcode = instr_.InstructionBits() & kMsaBITMask; in DecodeTypeMsaBIT() 5049 uint32_t opcode = instr_.InstructionBits() & kMsaMI10Mask; in DecodeTypeMsaMI10() [all …]
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D | simulator-mips64.h | 497 if (instr->InstructionBits() == nopInstr) { in BranchDelayInstructionDecode()
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/external/v8/src/arm/ |
D | constants-arm.h | 460 inline Instr InstructionBits() const { in InstructionBits() function 472 return (InstructionBits() >> nr) & 1; in Bit() 478 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 483 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField() 612 return signed_bitextract_32(23, 0, InstructionBits()); in SImmed24Value() 627 SetInstructionBits((InstructionBits() & ~(kImm24Mask)) | in SetBranchOffset()
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D | disasm-arm.cc | 544 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0FFFFFFF); in FormatOption() 2608 instr->InstructionBits()); in InstructionDecode()
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D | simulator-arm.cc | 146 sim_->break_instr_ = breakpc->InstructionBits(); in SetBreakpoint() 2341 PrintF("%08x\n", instr->InstructionBits()); in DecodeType01() 2350 PrintF("%08x\n", instr->InstructionBits()); in DecodeType01()
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/external/v8/src/arm64/ |
D | instructions-arm64.h | 81 V8_INLINE Instr InstructionBits() const { in InstructionBits() function 90 return (InstructionBits() >> pos) & 1; in Bit() 94 return unsigned_bitextract_32(msb, lsb, InstructionBits()); in Bits() 103 return InstructionBits() & mask; in Mask()
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D | instructions-arm64.cc | 630 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 636 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 643 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder() 651 instrbits_ = instr->InstructionBits(); in NEONFormatDecoder()
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D | assembler-arm64-inl.h | 585 DCHECK_EQ(instr->InstructionBits(), 0); 603 DCHECK_EQ(instr->InstructionBits(), 0);
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D | disasm-arm64.cc | 4037 reinterpret_cast<uint64_t>(instr), instr->InstructionBits(), in ProcessOutput() 4102 instr->InstructionBits(), GetOutput()); in ProcessOutput()
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/external/v8/src/ppc/ |
D | disasm-ppc.cc | 1154 instr->InstructionBits()); in InstructionDecode() 1156 if (ABI_USES_FUNCTION_DESCRIPTORS && instr->InstructionBits() == 0) { in InstructionDecode()
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D | constants-ppc.h | 2761 inline Instr InstructionBits() const { in InstructionBits() function 2771 inline int Bit(int nr) const { return (InstructionBits() >> nr) & 1; } in Bit() 2775 return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); in Bits() 2780 return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); in BitField()
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D | simulator-ppc.cc | 142 sim_->break_instr_ = break_pc->InstructionBits(); in SetBreakpoint() 234 ->InstructionBits() == 0x7D821008) { in Debug() 258 ->InstructionBits() == 0x7D821008) { in Debug()
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/external/vixl/src/aarch64/ |
D | instructions-aarch64.h | 159 VIXL_DEPRECATED("GetInstructionBits", Instr InstructionBits() const) {
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