/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrMMX.td | 26 multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 31 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]> { 37 [(set VR64:$dst, (IntId VR64:$src1, 42 string OpcodeStr, Intrinsic IntId, 47 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]>; 51 [(set VR64:$dst, (IntId VR64:$src1, 92 multiclass ssse3_palign_mm<string asm, Intrinsic IntId> { 96 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2, (i8 imm:$src3)))]>; 100 [(set VR64:$dst, (IntId VR64:$src1,
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D | X86InstrSSE.td | 3337 multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 3345 [(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>; 3351 [(set VR128:$dst, (IntId VR128:$src1, 3356 string OpcodeStr, Intrinsic IntId, 3363 [(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>; 3369 [(set VR128:$dst, (IntId VR128:$src1, 4993 multiclass SS41I_binop_rm_int8<bits<8> opc, string OpcodeStr, Intrinsic IntId> { 4996 [(set VR128:$dst, (IntId VR128:$src))]>, OpSize; 5001 (IntId (bitconvert (v2i64 (scalar_to_vector (loadi64 addr:$src))))))]>, 5094 multiclass SS41I_binop_rm_int4<bits<8> opc, string OpcodeStr, Intrinsic IntId> { [all …]
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D | X86ISelLowering.cpp | 12334 unsigned IntId = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); in computeMaskedBitsForTargetNode() local 12336 switch (IntId) { in computeMaskedBitsForTargetNode() 12345 switch (IntId) { in computeMaskedBitsForTargetNode()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrMMX.td | 35 multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 41 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]>, 48 [(set VR64:$dst, (IntId VR64:$src1, 54 string OpcodeStr, Intrinsic IntId, 60 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]>, 65 [(set VR64:$dst, (IntId VR64:$src1, 113 multiclass ssse3_palign_mm<string asm, Intrinsic IntId, 118 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2, (i8 imm:$src3)))]>, 123 [(set VR64:$dst, (IntId VR64:$src1,
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D | X86InstrSSE.td | 6102 Intrinsic IntId, RegisterClass RC, PatFrag memop_frag, 6113 [(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))]>, 6123 (IntId RC:$src1, 6309 PatFrag mem_frag, Intrinsic IntId, 6315 [(set RC:$dst, (IntId RC:$src1, RC:$src2, RC:$src3))], 6324 (IntId RC:$src1, (bitconvert (mem_frag addr:$src2)), 6474 X86MemOperand x86memop, Intrinsic IntId, 6480 [(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0))]>, 6488 (IntId VR128:$src1, 6748 multiclass SHAI_binop<bits<8> Opc, string OpcodeStr, Intrinsic IntId, [all …]
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/external/llvm/lib/Target/X86/ |
D | X86InstrMMX.td | 96 multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 101 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))], itins.rr>, 108 [(set VR64:$dst, (IntId VR64:$src1, 114 string OpcodeStr, Intrinsic IntId, 119 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))], itins.rr>, 124 [(set VR64:$dst, (IntId VR64:$src1, 171 multiclass ssse3_palign_mm<string asm, Intrinsic IntId> { 175 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2, (i8 imm:$src3)))]>, 180 [(set VR64:$dst, (IntId VR64:$src1,
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D | X86InstrSSE.td | 3862 multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 3874 [(set RC:$dst, (IntId RC:$src1, RC:$src2))], itins.rr>, 3881 [(set RC:$dst, (IntId RC:$src1, (bitconvert (memop_frag addr:$src2))))], 6879 Intrinsic IntId, RegisterClass RC, PatFrag memop_frag, 6890 [(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))], itins.rr>, 6900 (IntId RC:$src1, 7015 PatFrag mem_frag, Intrinsic IntId, 7021 [(set RC:$dst, (IntId RC:$src1, RC:$src2, RC:$src3))], 7030 (IntId RC:$src1, (bitconvert (mem_frag addr:$src2)), 7163 X86MemOperand x86memop, Intrinsic IntId, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonGenExtract.cpp | 211 Intrinsic::ID IntId = (BW == 32) ? Intrinsic::hexagon_S2_extractu in INITIALIZE_PASS_DEPENDENCY() local 214 Value *ExtF = Intrinsic::getDeclaration(Mod, IntId); in INITIALIZE_PASS_DEPENDENCY()
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D | HexagonISelLowering.h | 351 SDValue getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops,
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D | HexagonISelLoweringHVX.cpp | 200 HexagonTargetLowering::getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops, in getInt() argument 203 IntOps.push_back(DAG.getConstant(IntId, dl, MVT::i32)); in getInt()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenExtract.cpp | 199 Intrinsic::ID IntId = (BW == 32) ? Intrinsic::hexagon_S2_extractu in INITIALIZE_PASS_DEPENDENCY() local 202 Value *ExtF = Intrinsic::getDeclaration(Mod, IntId); in INITIALIZE_PASS_DEPENDENCY()
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