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Searched refs:IsFP32 (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/subzero/pydir/
Dgen_arm32_reg_tables.py20 IsFP32=0, IsFP64=0, IsVec128=0, Aliases=None): argument
24 assert not (IsFP32 and IsFP64)
25 assert not (IsFP32 and IsVec128)
27 assert not ((IsGPR) and (IsFP32 or IsFP64 or IsVec128))
110 Reg( 's0', 0, IsScratch=1, CCArg=1, IsFP32=1, Aliases= 's0, d0 , q0'),
111 Reg( 's1', 1, IsScratch=1, CCArg=2, IsFP32=1, Aliases= 's1, d0 , q0'),
112 Reg( 's2', 2, IsScratch=1, CCArg=3, IsFP32=1, Aliases= 's2, d1 , q0'),
113 Reg( 's3', 3, IsScratch=1, CCArg=4, IsFP32=1, Aliases= 's3, d1 , q0'),
114 Reg( 's4', 4, IsScratch=1, CCArg=5, IsFP32=1, Aliases= 's4, d2 , q1'),
115 Reg( 's5', 5, IsScratch=1, CCArg=6, IsFP32=1, Aliases= 's5, d2 , q1'),
[all …]
/external/swiftshader/third_party/subzero/src/
DIceRegistersARM32.def7 …IsScratch, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128,…
26 …IsScratch, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128,…
35 …IsScratch, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128,…
70 …IsScratch, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128,…
105 …IsScratch, IsPreserved, IsStackPtr, IsFramePtr, IsGPR, IsInt, IsI64Pair, IsFP32, IsFP64, IsVec128,…
DIceRegistersARM32.h96 unsigned IsFP32 : 1; member
162 return RegTable[RegNum].IsFP32; in isEncodedSReg()
DIceTargetLoweringARM32.cpp326 Float32Registers[i] = Entry.IsFP32; in staticInit()
346 } else if (Entry.IsFP32) { in staticInit()