| /external/clang/lib/CodeGen/ |
| D | CGExprScalar.cpp | 354 bool IsInc);
1596 llvm::Value *InVal, bool IsInc) { in createBinOpInfoFromIncDec() argument
1601 BinOp.Opcode = IsInc ? BO_Add : BO_Sub; in createBinOpInfoFromIncDec()
1608 const UnaryOperator *E, llvm::Value *InVal, bool IsInc) { in EmitIncDecConsiderOverflowBehavior() argument
1610 llvm::ConstantInt::get(InVal->getType(), IsInc ? 1 : -1, true); in EmitIncDecConsiderOverflowBehavior()
1611 StringRef Name = IsInc ? "inc" : "dec"; in EmitIncDecConsiderOverflowBehavior()
1620 return EmitOverflowCheckedBinOp(createBinOpInfoFromIncDec(E, InVal, IsInc)); in EmitIncDecConsiderOverflowBehavior()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 562 ISD::MemIndexedMode &AM, bool &IsInc,
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| D | AArch64ISelLowering.cpp | 9987 bool &IsInc, in getIndexedAddressParts() argument
9999 IsInc = (Op->getOpcode() == ISD::ADD); in getIndexedAddressParts()
10021 bool IsInc; in getPreIndexedAddressParts() local
10022 if (!getIndexedAddressParts(Ptr.getNode(), Base, Offset, AM, IsInc, DAG)) in getPreIndexedAddressParts()
10024 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
10042 bool IsInc; in getPostIndexedAddressParts() local
10043 if (!getIndexedAddressParts(Op, Base, Offset, AM, IsInc, DAG)) in getPostIndexedAddressParts()
10049 AM = IsInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 687 ISD::MemIndexedMode &AM, bool &IsInc,
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| D | AArch64ISelLowering.cpp | 11057 bool &IsInc, in getIndexedAddressParts() argument
11071 IsInc = (Op->getOpcode() == ISD::ADD); in getIndexedAddressParts()
11093 bool IsInc; in getPreIndexedAddressParts() local
11094 if (!getIndexedAddressParts(Ptr.getNode(), Base, Offset, AM, IsInc, DAG)) in getPreIndexedAddressParts()
11096 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
11114 bool IsInc; in getPostIndexedAddressParts() local
11115 if (!getIndexedAddressParts(Op, Base, Offset, AM, IsInc, DAG)) in getPostIndexedAddressParts()
11121 AM = IsInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAGHVX.cpp | 1840 bool IsInc = I == E-1 || SwapElems[I] < SwapElems[I+1]; in perfect() local
1843 while (++I < E-1 && IsInc == (SwapElems[I] < SwapElems[I+1])) in perfect()
1854 Res.Opc = IsInc ? Hexagon::V6_vshuffvdd : Hexagon::V6_vdealvdd; in perfect()
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 1365 const bool IsInc = std::string(#Inst).find("incl") != std::string::npos; \ in TEST_F()
1375 ASSERT_EQ(static_cast<uint32_t>(Value0 + (IsInc ? 1 : -1)), \ in TEST_F()
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 1354 const bool IsInc = std::string(#Inst).find("incl") != std::string::npos; \ in TEST_F()
1364 ASSERT_EQ(static_cast<uint32_t>(Value0 + (IsInc ? 1 : -1)), \ in TEST_F()
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| /external/clang/lib/Sema/ |
| D | SemaExpr.cpp | 10173 bool IsInc, bool IsPrefix) { in CheckIncrementDecrementOperand() argument
10188 if (!IsInc) { in CheckIncrementDecrementOperand()
10198 S.Diag(OpLoc, diag::err_increment_decrement_enum) << IsInc << ResType; in CheckIncrementDecrementOperand()
10220 IsInc, IsPrefix); in CheckIncrementDecrementOperand()
10232 << ResType << int(IsInc) << Op->getSourceRange(); in CheckIncrementDecrementOperand()
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