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Searched refs:IsLow (Results 1 – 4 of 4) sorted by relevance

/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.h998 operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) && in Adc()
999 operand.GetBaseRegister().IsLow(); in Adc()
1019 bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() && in Adc()
1021 operand.GetBaseRegister().IsLow(); in Adc()
1066 (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() && in Add()
1067 rd.IsLow()) || in Add()
1070 rd.IsLow() && rn.Is(rd)) || in Add()
1073 ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) || in Add()
1075 (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() && in Add()
1076 operand.GetBaseRegister().IsLow()) || in Add()
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Dassembler-aarch32.cc1960 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in adc()
1961 rm.IsLow()) { in adc()
2048 if (OutsideITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in adcs()
2049 rm.IsLow()) { in adcs()
2111 if (!size.IsWide() && rd.IsLow() && rn.Is(pc) && (imm <= 1020) && in add()
2119 if (InITBlock() && !size.IsWide() && rd.IsLow() && rn.IsLow() && in add()
2126 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in add()
2133 if (!size.IsWide() && rd.IsLow() && rn.Is(sp) && (imm <= 1020) && in add()
2221 if (InITBlock() && !size.IsWide() && rd.IsLow() && rn.IsLow() && in add()
2222 rm.IsLow()) { in add()
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Dinstructions-aarch32.h143 bool IsLow() const { return GetCode() < kNumberOfT32LowRegisters; } in IsLow() function
Dmacro-assembler-aarch32.cc1224 } else if (rn.IsLow()) { in Delegate()