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Searched refs:IsQuietNaN (Results 1 – 7 of 7) sorted by relevance

/external/v8/src/arm64/
Dutils-arm64.h98 inline bool IsQuietNaN(T num) { in IsQuietNaN() function
Dsimulator-arm64.h2313 DCHECK(IsQuietNaN(op1)); in FPProcessNaNs()
2316 DCHECK(IsQuietNaN(op2)); in FPProcessNaNs()
2332 DCHECK(IsQuietNaN(op1)); in FPProcessNaNs3()
2335 DCHECK(IsQuietNaN(op2)); in FPProcessNaNs3()
2338 DCHECK(IsQuietNaN(op3)); in FPProcessNaNs3()
Dsimulator-logic-arm64.cc2990 if (operation_generates_nan && IsQuietNaN(a)) { in FPMulAdd()
3073 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMaxNM()
3075 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMaxNM()
3098 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMinNM()
3100 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMinNM()
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc11186 VIXL_ASSERT(IsQuietNaN(q1)); in TEST()
11187 VIXL_ASSERT(IsQuietNaN(q2)); in TEST()
11188 VIXL_ASSERT(IsQuietNaN(qa)); in TEST()
11197 VIXL_ASSERT(IsQuietNaN(s1_proc)); in TEST()
11198 VIXL_ASSERT(IsQuietNaN(s2_proc)); in TEST()
11199 VIXL_ASSERT(IsQuietNaN(sa_proc)); in TEST()
11200 VIXL_ASSERT(IsQuietNaN(q1_proc)); in TEST()
11201 VIXL_ASSERT(IsQuietNaN(q2_proc)); in TEST()
11202 VIXL_ASSERT(IsQuietNaN(qa_proc)); in TEST()
11209 VIXL_ASSERT(IsQuietNaN(s1_proc_neg)); in TEST()
[all …]
/external/vixl/src/aarch64/
Dlogic-aarch64.cc3761 if (operation_generates_nan && IsQuietNaN(a)) { in FPMulAdd()
3848 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMaxNM()
3850 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMaxNM()
3875 if (IsQuietNaN(a) && !IsQuietNaN(b)) { in FPMinNM()
3877 } else if (!IsQuietNaN(a) && IsQuietNaN(b)) { in FPMinNM()
Dsimulator-aarch64.h3197 VIXL_ASSERT(IsQuietNaN(op1));
3200 VIXL_ASSERT(IsQuietNaN(op2));
3216 VIXL_ASSERT(IsQuietNaN(op1));
3219 VIXL_ASSERT(IsQuietNaN(op2));
3222 VIXL_ASSERT(IsQuietNaN(op3));
/external/vixl/src/
Dutils-vixl.h411 inline bool IsQuietNaN(T num) { in IsQuietNaN() function