| /external/u-boot/board/freescale/t208xrdb/ |
| D | README | 13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
89 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
90 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
92 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
93 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
94 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
95 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
110 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
111 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
112 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB
[all …]
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| /external/u-boot/board/freescale/t104xrdb/ |
| D | README | 45 - Four e5500 cores, each with a private 256 KB L2 cache
46 - 256 KB shared L3 CoreNet platform cache (CPC)
168 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
169 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
171 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
172 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
173 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
174 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
189 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
190 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
[all …]
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| /external/u-boot/board/freescale/t102xrdb/ |
| D | README | 14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
129 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
130 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
132 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
133 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
134 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
148 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
149 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
150 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB
[all …]
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| /external/u-boot/board/freescale/t208xqds/ |
| D | README | 13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
69 - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
124 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
125 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
127 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
128 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
129 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
130 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
145 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
146 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
[all …]
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| /external/u-boot/board/freescale/t102xqds/ |
| D | README | 14 - two e5500 cores, each with a private 256 KB L2 cache
19 - 256 KB shared L3 CoreNet platform cache (CPC)
155 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
156 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
158 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
159 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
160 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
175 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
176 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
177 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB
[all …]
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| /external/u-boot/board/freescale/t1040qds/ |
| D | README | 14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
99 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
100 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
102 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
103 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
104 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
105 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
121 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
122 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
[all …]
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| /external/u-boot/doc/ |
| D | README.N1213 | 27 - 4KB & 1MB.
28 - 8KB & 1MB.
33 - Cache size: 8KB/16KB/32KB/64KB.
38 - Size: 4KB to 1MB.
|
| D | README.b4860qds | 90 - 2 KB internal memory space including
173 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
175 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
179 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
203 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
205 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
209 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
230 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
231 0xEFF20000 0xEFF3FFFF U-Boot env (current bank) 128KB
232 0xEFF00000 0xEFF1FFFF FMAN Ucode (current bank) 128KB
[all …]
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| /external/v8/tools/heap-stats/ |
| D | global-timeline.js | 90 (ptr_compr_benefit / KB).toFixed(2) + "KB " +
92 data.push(ptr_compr_benefit / KB);
94 data.push(data_set.embedder_fields / KB);
95 data.push(data_set.tagged_fields / KB);
96 data.push(data_set.other_raw_fields / KB);
97 data.push(data_set.unboxed_double_fields / KB);
106 (sum_total / count / KB).toFixed(2) + " KB");
129 KB);
149 data.push(data_set[instance_type].overall / KB);
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| D | helper.js | 5 const KB = 1024; constant
6 const MB = KB * KB;
7 const GB = MB * KB;
|
| /external/ltp/testcases/kernel/syscalls/mlock/ |
| D | mlock03.c | 41 #define KB 1024 macro
54 char b[KB]; in main()
66 if (!fgets(b, KB - 1, fp)) in main()
73 first = (to - from) / KB; in main()
94 last = (to - from) / KB; in main()
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| /external/u-boot/board/freescale/t4qds/ |
| D | README | 111 0x0_f800_0000 (0xf_f800_0000) - 0x0_f803_ffff 256KB PCIE IO
114 0x0_ffdf_0000 (0xf_ffdf_0000) - 0x0_ffdf_03ff 4KB QIXIS
115 0x0_ffff_f000 (0x0_7fff_fff0) - 0x0_ffff_ffff 4KB Boot page translation for secondary cores
147 and copy U-Boot(768 KB) from NAND/SD device to DDR.
158 |SecureBoot header | 0xFFFC0000 (32KB) |
160 |GD, BD | 0xFFFC8000 (4KB) |
162 |ENV | 0xFFFC9000 (8KB) |
164 |HEAP | 0xFFFCB000 (50KB) |
166 |STACK | 0xFFFD8000 (22KB) |
168 |U-Boot SPL | 0xFFFD8000 (160KB) |
[all …]
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| /external/u-boot/board/freescale/ls1046ardb/ |
| D | README | 46 0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB
47 0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB
49 0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB
50 0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - CPLD 4KB
67 0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB
68 0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB
|
| /external/lz4/lib/ |
| D | lz4frame.c | 183 #define KB *(1<<10) macro
269 static const size_t blockSizes[4] = { 64 KB, 256 KB, 1 MB, 4 MB }; in LZ4F_getBlockSize()
291 size_t maxBlockSize = 64 KB; in LZ4F_optimalBSID()
477 if (dictSize > 64 KB) { in LZ4F_createCDict()
478 dictStart += dictSize - 64 KB; in LZ4F_createCDict()
479 dictSize = 64 KB; in LZ4F_createCDict()
626 … (cctxPtr->prefs.frameInfo.blockMode == LZ4F_blockLinked) * 64 KB : /* only needs windows size */ in LZ4F_compressBegin_usingCDict()
627 … cctxPtr->maxBlockSize + ((cctxPtr->prefs.frameInfo.blockMode == LZ4F_blockLinked) * 128 KB); in LZ4F_compressBegin_usingCDict()
785 return LZ4_saveDict ((LZ4_stream_t*)(cctxPtr->lz4CtxPtr), (char*)(cctxPtr->tmpBuff), 64 KB); in LZ4F_localSaveDict()
786 return LZ4_saveDictHC ((LZ4_streamHC_t*)(cctxPtr->lz4CtxPtr), (char*)(cctxPtr->tmpBuff), 64 KB); in LZ4F_localSaveDict()
[all …]
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| D | lz4.c | 305 #define KB *(1 <<10) macro
451 static const int LZ4_64Klimit = ((64 KB) + (MFLIMIT-1));
621 || inputSize >= 4 KB) in LZ4_prepareTable()
638 cctx->currentOffset += 64 KB; in LZ4_prepareTable()
1213 if ((dictEnd - p) > 64 KB) p = dictEnd - 64 KB; in LZ4_loadDict()
1214 base = dictEnd - 64 KB - dict->currentOffset; in LZ4_loadDict()
1217 dict->currentOffset += 64 KB; in LZ4_loadDict()
1240 working_stream->internal_donotuse.currentOffset = 64 KB; in LZ4_attach_dictionary()
1253 U32 const delta = LZ4_dict->currentOffset - 64 KB; in LZ4_renormDictT()
1261 LZ4_dict->currentOffset = 64 KB; in LZ4_renormDictT()
[all …]
|
| /external/v8/src/heap/ |
| D | scavenge-job.h | 62 static const int kInitialScavengeSpeedInBytesPerMs = 256 * KB;
67 static const size_t kBytesAllocatedBeforeNextIdleTask = 1024 * KB;
69 static const size_t kMinAllocationLimit = 512 * KB;
|
| /external/u-boot/board/gateworks/gw_ventana/ |
| D | README | 111 MMC the SPL will be loaded from offset 0x400 (1KB). Once the SPL is
112 booted, it will load and execute U-Boot (u-boot.img) from offset 69KB
128 # copy SPL to 1KB offset
130 # copy U-Boot to 69KB offset
144 - spl : 1KB-69KB (68KB) required by IMX6 BOOT ROM
145 - uboot : 69KB-709KB (640KB) defined by
147 - env : 709KB-965KB (256KB) defined by
174 as the size of the SPL is fairly limitted (to 64KB based on the smallest
266 IMX6 BOOT ROM (fixed offset of 1KB), and U-Boot can be loaded by the SPL
267 (fixed offset of 69KB defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR).
[all …]
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| /external/u-boot/board/freescale/ls1043ardb/ |
| D | README | 42 0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB
43 0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB
46 0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB
47 0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB
|
| /external/u-boot/board/freescale/ls1043aqds/ |
| D | README | 50 0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB
51 0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB
54 0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB
55 0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB
|
| /external/curl/tests/data/ |
| D | test1060 | 42 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
62 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
82 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
102 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
122 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
142 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
162 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
182 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
202 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
222 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
[all …]
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| D | test1061 | 44 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
64 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
84 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
104 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
124 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
144 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
164 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
184 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
204 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
224 end of 1 KB aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
[all …]
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| /external/u-boot/board/freescale/ls1046aqds/ |
| D | README | 50 0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB
51 0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB
54 0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB
55 0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - FPGA 4KB
|
| /external/clang/test/SemaCXX/ |
| D | namespace-alias.cpp | 74 namespace KB = KA; in f()
75 KB::func(); in f()
86 KB::func(); // expected-error {{undeclared identifier 'KB'}} in h()
|
| /external/u-boot/board/cadence/xtfpga/ |
| D | README | 67 connect them. Be aware that the board has only 128 KB of SRAM,
73 has been programmed into the first two 64 KB sectors of the Flash.
103 The XT-AV60 board has only 128 KB of SDRAM that can be mapped
105 OCD/JTAG. This limits the useful size of U-Boot to 128 KB (0x20000)
114 debugged, because the image can still fit into the 128 KB SRAM.
124 check and fatal error message if the image size exceeds 128 KB.
|
| /external/v8/src/ |
| D | globals.h | 109 constexpr int KB = 1024; variable
110 constexpr int MB = KB * KB;
111 constexpr int GB = KB * KB * KB;
177 constexpr size_t kCodeRangeAreaAlignment = 64 * KB; // OS page on PPC Linux
180 constexpr size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
183 constexpr size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
201 constexpr size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
206 constexpr size_t kCodeRangeAreaAlignment = 64 * KB; // OS page on PPC Linux
211 constexpr size_t kCodeRangeAreaAlignment = 4 * KB; // OS page.
230 constexpr int kMaxNewSpaceHeapObjectSize = 32 * KB;
|