Searched refs:KS2_DDR3APLLCTL1 (Results 1 – 3 of 3) sorted by relevance
363 tmp = readl(KS2_DDR3APLLCTL1); in ddr3_reset_ddrphy()365 writel(tmp, KS2_DDR3APLLCTL1); in ddr3_reset_ddrphy()371 tmp = readl(KS2_DDR3APLLCTL1); in ddr3_reset_ddrphy()373 __raw_writel(tmp, KS2_DDR3APLLCTL1); in ddr3_reset_ddrphy()
31 [DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
180 #define KS2_DDR3APLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x364) macro