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Searched refs:KS2_DDR3_ECC_ADDR_RANGE1_OFFSET (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-keystone/include/mach/
Dhardware.h99 #define KS2_DDR3_ECC_ADDR_RANGE1_OFFSET 0x114 macro
/external/u-boot/cmd/ti/
Dddr3.c211 writel(ecc_ctrl, EMIF1_BASE + KS2_DDR3_ECC_ADDR_RANGE1_OFFSET); in ddr_memory_ecc_err()
/external/u-boot/arch/arm/mach-keystone/
Dddr3.c246 __raw_writel(0, base + KS2_DDR3_ECC_ADDR_RANGE1_OFFSET); in ddr3_ecc_init_range()