Searched refs:KS2_DDRPHY_PGSR0_OFFSET (Results 1 – 2 of 2) sorted by relevance
28 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) in ddr3_init_ddrphy()63 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1) in ddr3_init_ddrphy()97 while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1) in ddr3_init_ddrphy()392 tmp_a = __raw_readl(KS2_DDR3A_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); in ddr3_err_reset_workaround()393 tmp_b = __raw_readl(KS2_DDR3B_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); in ddr3_err_reset_workaround()
29 #define KS2_DDRPHY_PGSR0_OFFSET 0x10 macro