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Searched refs:L1CSR0_DCLFR (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Drelease.S120 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
121 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
Dstart.S789 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
790 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
/external/u-boot/arch/powerpc/include/asm/
Dprocessor.h488 #define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ macro