Searched refs:L1CSR1_CPE (Results 1 – 3 of 3) sorted by relevance
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | release.S | 110 lis r3,(L1CSR1_CPE|L1CSR1_ICE)@h
111 ori r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
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| D | start.S | 779 lis r3,(L1CSR1_CPE|L1CSR1_ICE)@h
780 ori r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
942 lis r3,(L1CSR1_CPE|L1CSR1_ICE)@h
943 ori r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
1375 ori r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l
1376 oris r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@h
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | processor.h | 492 #define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ macro
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