Home
last modified time | relevance | path

Searched refs:LAR (Results 1 – 17 of 17) sorted by relevance

/external/libgsm/src/
Dlpc.c287 static void Quantization_and_coding P1((LAR),
288 register word * LAR /* [0..7] IN/OUT */
306 temp = GSM_MULT( A, *LAR ); \
310 *LAR = temp>MAC ? MAC - MIC : (temp<MIC ? 0 : temp - MIC); \
311 LAR++;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Transforms/Scalar/
DLoopPassManager.h292 LoopStandardAnalysisResults LAR = {AM.getResult<AAManager>(F),
337 assert(L->isRecursivelyLCSSAForm(LAR.DT, LI) &&
341 PreservedAnalyses PassPA = Pass.run(*L, LAM, LAR, Updater);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/
DLoopVectorizationLegality.cpp747 const OptimizationRemarkAnalysis *LAR = LAI->getReport(); in canVectorizeMemory() local
748 if (LAR) { in canVectorizeMemory()
751 "loop not vectorized: ", *LAR); in canVectorizeMemory()
/external/llvm/lib/Analysis/
DScalarEvolution.cpp7584 const SCEVAddRecExpr *LAR = dyn_cast<SCEVAddRecExpr>(LHS); in isKnownPredicate() local
7588 if (LAR) { in isKnownPredicate()
7589 const Loop *L = LAR->getLoop(); in isKnownPredicate()
7590 if (isLoopEntryGuardedByCond(L, Pred, LAR->getStart(), RHS) && in isKnownPredicate()
7591 isLoopBackedgeGuardedByCond(L, Pred, LAR->getPostIncExpr(*this), RHS)) { in isKnownPredicate()
7600 if (!LAR) return true; in isKnownPredicate()
8243 const auto *LAR = cast<SCEVAddRecExpr>(Less); in computeConstantDifference() local
8246 if (LAR->getLoop() != MAR->getLoop()) in computeConstantDifference()
8251 if (!LAR->isAffine() || !MAR->isAffine()) in computeConstantDifference()
8254 if (LAR->getStepRecurrence(*this) != MAR->getStepRecurrence(*this)) in computeConstantDifference()
[all …]
/external/ImageMagick/PerlMagick/t/reference/write/filter/
DSigmoidalContrast.miff43 ….�2O�^m�FL�1,�-�%�1'�/-�A=�2'�/#�/#�/&�B7�*&�&(�%'�)$�+�E=����z��Rq�6[�7LAR(m�U��l��n{�a}�a~�g}…
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/
DScalarEvolution.cpp9593 const auto *LAR = cast<SCEVAddRecExpr>(Less); in computeConstantDifference() local
9596 if (LAR->getLoop() != MAR->getLoop()) in computeConstantDifference()
9601 if (!LAR->isAffine() || !MAR->isAffine()) in computeConstantDifference()
9604 if (LAR->getStepRecurrence(*this) != MAR->getStepRecurrence(*this)) in computeConstantDifference()
9607 Less = LAR->getStart(); in computeConstantDifference()
9894 const SCEVAddRecExpr *LAR = dyn_cast<SCEVAddRecExpr>(LHS); in IsKnownPredicateViaAddRecStart() local
9895 if (!LAR) in IsKnownPredicateViaAddRecStart()
9900 if (LAR->getLoop() != RAR->getLoop()) in IsKnownPredicateViaAddRecStart()
9902 if (!LAR->isAffine() || !RAR->isAffine()) in IsKnownPredicateViaAddRecStart()
9905 if (LAR->getStepRecurrence(SE) != RAR->getStepRecurrence(SE)) in IsKnownPredicateViaAddRecStart()
[all …]
/external/llvm/lib/Target/X86/
DX86ScheduleAtom.td432 // LAR
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86SchedSkylakeClient.td927 def: InstRW<[SKLWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
1386 def: InstRW<[SKLWriteResGroup131], (instregex "LAR(16|32|64)rm",
DX86SchedBroadwell.td1308 def: InstRW<[BWWriteResGroup113], (instregex "LAR(16|32|64)rm",
1410 def: InstRW<[BWWriteResGroup144], (instregex "LAR(16|32|64)rr")>;
DX86SchedHaswell.td1514 def: InstRW<[HWWriteResGroup83], (instregex "LAR(16|32|64)rr")>;
1521 def: InstRW<[HWWriteResGroup87], (instregex "LAR(16|32|64)rm",
DX86SchedSkylakeServer.td1045 def: InstRW<[SKXWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
1824 def: InstRW<[SKXWriteResGroup146], (instregex "LAR(16|32|64)rm",
/external/mesa3d/src/mesa/x86/
Dassyntax.h502 #define LAR(a, b) CHOICE(lar ARG2(a, b), lar ARG2(a, b), lar ARG2(b, a)) macro
1220 #define LAR(a, b) lar b, a macro
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
DsubdivisionData.txt2739 MA-LAR Larache
D2013-1_UNLOCODE_CodeListPart2.csv2965 ,"GB","LAR","Larne","Larne","LRN","1-------","AF","9511",,,
8711 ,"IE","LAR","Lurganm Armagh","Lurganm Armagh","CW","1-------","RQ","0901",,,
12748 ,"IT","LAR","Larderello","Larderello",,"--3-----","RQ","9501",,,
18668 ,"MA","LAR","Larache","Larache",,"1-------","QQ","8103",,,
21307 ,"NL","LAR","Laren","Laren",,"--3-----","AF","9602",,,
22619 ,"NO","LAR","Larvik","Larvik","07","123-----","AF","9501",,,
D2013-1_UNLOCODE_CodeListPart1.csv529 ,"AR","LAR","La Reja","La Reja","B","--3-----","RL","1207",,"3438S 05848W",
2810 ,"AU","LAR","Labrador","Labrador","QLD","--3-----","RL","0701",,"2757S 15323E",
7129 ,"BR","LAR","Lavras","Lavras","MG","--3-----","RQ","0607",,,
9567 ,"CA","LAR","Laurier","Laurier","MB","--3-----","RL","0901",,"5054N 09933W",
15127 "X","CY","LAR","Larnaca Port","Larnaca Port",,"1-------","XX","1301",,"3455N 03338E",""
21404 ,"DE","LAR","Lahr","Lahr","BW","-23-----","AF","9501",,,
29437 ,"ES","LAR","Larrondo","Larrondo",,"0-------","RQ","9307",,,
31757 "+","FI","LAR","Larsmo","Larsmo",,"--3-----","RL","1301",,"6345N 02248E",
37657 ,"FR","LAR","Les Arcs","Les Arcs","83","-2------","AF","9506","XRS",,
D2013-1_UNLOCODE_CodeListPart3.csv6383 "X","SE","LAR","Lauter","Lauter","I","1-------","XX","1301",,"5757N 01906E",""
18293 ,"US","LAR","Laramie","Laramie","WY","--34----","AI","0401",,"4118N 10535W",
/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt8326 ICLASS : LAR
8333 COMMENT : LAR only sometimes writes its destination register.