Searched refs:LARL (Results 1 – 23 of 23) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | regalloc-fast-invalid-kill-flag.mir | 26 # CHECK-NEXT: LARL
31 %2 = LARL @g_167
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| D | la-02.ll | 24 ; variable will be in range of LARL.
56 ; Check loads of external functions. This could use LARL, but we don't have
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| D | tls-01.ll | 9 ; matter whether we use LARL/AG or LGRL/AGR for the last part.
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| D | clear-liverange-spillreg.mir | 477 %41 = LARL @best8x8fwref
478 %42 = LARL @best8x8mode
479 %63 = LARL @rec_mbY8x8
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| D | la-03.ll | 39 ; must be in range of LARL.
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| D | la-01.ll | 84 ; Test that LARL can be rematerialized.
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| D | int-move-08.ll | 103 ; Test a case where we want to use one LARL for accesses to two different
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| D | RAbasic-invalid-LR-update.mir | 151 %44 = LARL %const.0
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | la-02.ll | 24 ; variable will be in range of LARL.
56 ; Check loads of external functions. This could use LARL, but we don't have
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| D | tls-01.ll | 9 ; matter whether we use LARL/AG or LGRL/AGR for the last part.
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| D | la-03.ll | 39 ; must be in range of LARL.
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| D | la-01.ll | 84 ; Test that LARL can be rematerialized.
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| D | int-move-08.ll | 103 ; Test a case where we want to use one LARL for accesses to two different
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| /external/v8/src/s390/ |
| D | assembler-s390.cc | 436 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode || in target_at()
475 } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) { in target_at_put()
510 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode || in max_reach_from()
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| D | simulator-s390.h | 627 EVALUATE(LARL);
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| D | constants-s390.h | 732 V(larl, LARL, 0xC00) /* type = RIL_B LOAD ADDRESS RELATIVE LONG */ \
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| D | simulator-s390.cc | 918 EvalTable[LARL] = &Simulator::Evaluate_LARL; in EvalTableInit()
4683 EVALUATE(LARL) { in EVALUATE() argument
4684 DCHECK_OPCODE(LARL); in EVALUATE()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZAsmPrinter.cpp | 313 LoweredMI = MCInstBuilder(SystemZ::LARL) in EmitInstruction()
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| D | SystemZInstrInfo.td | 768 def LARL : InstRIL<0xC00, (outs GR64:$R1), (ins pcrel32:$I2),
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZAsmPrinter.cpp | 313 LoweredMI = MCInstBuilder(SystemZ::LARL) in EmitInstruction()
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| D | SystemZInstrInfo.td | 785 def LARL : LoadAddressRIL<"larl", 0xC00, bitconvert>;
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| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 582 11541043U, // LARL
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| D | SystemZGenDisassemblerTables.inc | 841 /* 15 */ MCD_OPC_Decode, 177, 4, 92, // Opcode: LARL
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