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Searched refs:LBB0_1 (Results 1 – 25 of 146) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Daddsubcarry-promotion.ll19 ; ARM: .LBB0_1:
20 ; ARM: b .LBB0_1
30 ; THUMB1: .LBB0_1:
31 ; THUMB1: b .LBB0_1
40 ; THUMB: .LBB0_1:
41 ; THUMB: b .LBB0_1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr33828.ll12 ; X86-NEXT: jne .LBB0_1
15 ; X86-NEXT: .LBB0_1: # %if.then11
21 ; X64-NEXT: jne .LBB0_1
24 ; X64-NEXT: .LBB0_1: # %if.then11
Dsplit-extend-vector-inreg.ll14 ; X32-NEXT: .LBB0_1: # %CF
17 ; X32-NEXT: jne .LBB0_1
26 ; X64-NEXT: .LBB0_1: # %CF
29 ; X64-NEXT: jne .LBB0_1
Dpr33290.ll14 ; X86-NEXT: .LBB0_1: # %for.cond
20 ; X86-NEXT: jmp .LBB0_1
27 ; X64-NEXT: .LBB0_1: # %for.cond
36 ; X64-NEXT: jmp .LBB0_1
Dpr22338.ll16 ; X86-NEXT: .LBB0_1: # %bb1
19 ; X86-NEXT: je .LBB0_1
33 ; X64-NEXT: .LBB0_1: # %bb1
36 ; X64-NEXT: je .LBB0_1
Dlea-opt-cse2.ll11 ; X64-NEXT: .LBB0_1: # %loop
18 ; X64-NEXT: jne .LBB0_1
36 ; X86-NEXT: .LBB0_1: # %loop
43 ; X86-NEXT: jne .LBB0_1
Dxor-icmp.ll12 ; X32-NEXT: je .LBB0_1
15 ; X32-NEXT: .LBB0_1: # %bb
23 ; X64-NEXT: je .LBB0_1
26 ; X64-NEXT: .LBB0_1: # %bb
Dundef-label.ll4 ; This is a case where we would incorrectly conclude that LBB0_1 could only
16 ; CHECK-NEXT: jne .LBB0_1
18 ; CHECK-NEXT: .LBB0_1: # %foo.preheader
D2009-02-26-MachineLICMBug.ll23 ; CHECK-NEXT: jmp LBB0_1
37 ; CHECK-NEXT: LBB0_1: ## %bb4
46 ; CHECK-NEXT: jne LBB0_1
50 ; CHECK-NEXT: jne LBB0_1
Dasm-label2.ll7 ; CHECK: jmp LBB0_1
8 ; CHECK: LBB0_1:
Dpr32108.ll9 ; CHECK-NEXT: .LBB0_1: # %CF244
11 ; CHECK-NEXT: jmp .LBB0_1
Dloop-search.ll11 ; CHECK-NEXT: jle LBB0_1
25 ; ### FIXME: %bb.3 and LBB0_1 should be merged
30 ; CHECK-NEXT: LBB0_1:
/external/llvm/test/CodeGen/X86/
Dundef-label.ll3 ; This is a case where we would incorrectly conclude that LBB0_1 could only
6 ; CHECK: jne .LBB0_1
8 ; CHECK-NEXT: .LBB0_1:
Dasm-label2.ll7 ; CHECK: jmp LBB0_1
8 ; CHECK: LBB0_1:
Duint64-to-float.ll11 ; CHECK-NEXT: js LBB0_1
14 ; CHECK: LBB0_1
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dundef-label.ll3 ; This is a case where we would incorrectly conclude that LBB0_1 could only
6 ; CHECK: jne .LBB0_1
8 ; CHECK-NEXT: .LBB0_1:
Dasm-label2.ll7 ; CHECK: jmp LBB0_1
8 ; CHECK: LBB0_1:
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DPR35812-neg-cmpxchg.ll19 ; CHECK: .LBB0_1: # %L.entry
24 ; CHECK: bne 0, .LBB0_1
50 ; CHECK-P7: .LBB0_1: # %L.entry
58 ; CHECK-P7: bne 0, .LBB0_1
/external/swiftshader/third_party/LLVM/test/CodeGen/XCore/
Dlicm-ldwcp.ll7 ; CHECK-NEXT: .LBB0_1:
9 ; CHECK-NEXT: bu .LBB0_1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/COFF/
Dsimple-fixups.s18 LBB0_1: # %i label
20 jmp LBB0_1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/XCore/
Dlicm-ldwcp.ll7 ; CHECK-NEXT: .LBB0_1:
9 ; CHECK-NEXT: bu .LBB0_1
/external/llvm/test/MC/COFF/
Dsimple-fixups.s18 LBB0_1: # %i label
20 jmp LBB0_1
/external/swiftshader/third_party/LLVM/test/MC/COFF/
Dsimple-fixups.s17 LBB0_1: # %i label
19 jmp LBB0_1
/external/llvm/test/CodeGen/XCore/
Dlicm-ldwcp.ll7 ; CHECK-NEXT: .LBB0_1:
9 ; CHECK-NEXT: bu .LBB0_1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
DatomicCmpSwapPW.ll55 ; N32-NEXT: .LBB0_1: # %entry
64 ; N32-NEXT: beqz $8, .LBB0_1
90 ; N64-NEXT: .LBB0_1: # %entry
99 ; N64-NEXT: beqz $7, .LBB0_1

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